*/
#include <common.h>
+#include <fdt_support.h>
+#include <init.h>
#include <ioports.h>
#include <mpc83xx.h>
#include <asm/mpc8349_pci.h>
return -ENXIO;
/* DDR SDRAM - Main memory */
- im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
+ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR;
msize = spd_sdram();
int checkboard(void)
{
-#ifdef VME_CADDY2
+#ifdef CONFIG_TARGET_CADDY2
puts("Board: esd VME-CADDY/2\n");
#else
puts("Board: esd VME-CPU/8349\n");
return 0;
}
-#ifdef VME_CADDY2
+#ifdef CONFIG_TARGET_CADDY2
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
* Provide SPD values for spd_sdram(). Both boards (VME-CADDY/2
* and VME-CADDY/2) have different SDRAM configurations.
*/
-#ifdef VME_CADDY2
+#ifdef CONFIG_TARGET_CADDY2
#define SMALL_RAM 0xff
#define LARGE_RAM 0x00
#else
SPD_VAL(0x7e, 0x1d), /* 63 */
{ 'e', 's', 'd', '-', 'g', 'm', 'b', 'h' },
SPD_VAL(0x00, 0x00), /* 72 */
-#ifdef VME_CADDY2
+#ifdef CONFIG_TARGET_CADDY2
{ "vme-caddy/2 ram " }
#else
{ "vme-cpu/2 ram " }