Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / board / bachmann / ot1200 / ot1200_spl.c

diff --git a/board/bachmann/ot1200/ot1200_spl.c b/board/bachmann/ot1200/ot1200_spl.c
index 9c77fd3330a72a535adfd068874afe44d116c63e..7fbd6f2c5d3e1f93f1fd8a5de941a36b2a4cf2a3 100644 (file)
--- a/board/bachmann/ot1200/ot1200_spl.c
+++ b/board/bachmann/ot1200/ot1200_spl.c
@@ -1,15 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015, Bachmann electronic GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 /* Configure MX6Q/DUAL mmdc DDR io registers */
 static struct mx6dq_iomux_ddr_regs ot1200_ddr_ioregs = {
        /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */
@@ -85,6 +83,8 @@ static struct mx6_ddr_sysinfo ot1200_ddr_sysinfo = {
        .bi_on      = 1,        /* Bank interleaving enabled */ /* war 1 */
        .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
        .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
+       .refsel = 1,            /* Refresh cycles at 32KHz */
+       .refr = 7,              /* 8 refresh commands per refresh cycle */
 };
 
 /* MT41K128M16JT-125 */
@@ -149,14 +149,4 @@ void board_init_f(ulong dummy)
 
        /* configure MMDC for SDRAM width/size and per-model calibration */
        ot1200_spl_dram_init();
-
-       /* Clear the BSS. */
-       memset(__bss_start, 0, __bss_end - __bss_start);
-
-       /* load/boot image from boot device */
-       board_init_r(NULL, 0);
-}
-
-void reset_cpu(ulong addr)
-{
 }