* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
+#include <command.h>
+#include <image.h>
+#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <bmp_logo.h>
#include <dm/root.h>
#include <env.h>
+#include <i2c_eeprom.h>
+#include <i2c.h>
#include <micrel.h>
#include <miiphy.h>
#include <lcd.h>
#include <led.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/da9063_pmic.h>
#include <splash.h>
#include <video_fb.h>
setup_one_led("led_blue", LEDST_OFF);
}
-int board_late_init(void)
+#define ARI_RESC_FMT "setenv rescue_reason setenv bootargs \\${bootargs}" \
+ " rescueReason=%d "
+
+static void aristainetos_run_rescue_command(int reason)
{
+ char rescue_reason_command[80];
+
+ sprintf(rescue_reason_command, ARI_RESC_FMT, reason);
+ run_command(rescue_reason_command, 0);
+}
+
+static int aristainetos_eeprom(void)
+{
+ struct udevice *dev;
+ int off;
+ int ret;
+ u8 data[0x10];
+ u8 rescue_reason;
+
+ off = fdt_path_offset(gd->fdt_blob, "eeprom0");
+ if (off < 0) {
+ printf("%s: No eeprom0 path offset\n", __func__);
+ return off;
+ }
+
+ ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+ if (ret) {
+ printf("%s: Could not find EEPROM\n", __func__);
+ return ret;
+ }
+
+ ret = i2c_set_chip_offset_len(dev, 2);
+ if (ret)
+ return ret;
+
+ ret = i2c_eeprom_read(dev, 0x1ff0, (uint8_t *)data, 6);
+ if (ret) {
+ printf("%s: Could not read EEPROM\n", __func__);
+ return ret;
+ }
+
+ if (strncmp((char *)&data[3], "ReScUe", 6) == 0) {
+ rescue_reason = *(uint8_t *)&data[9];
+ memset(&data[3], 0xff, 7);
+ i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)&data[3], 7);
+ printf("\nBooting into Rescue System (EEPROM)\n");
+ aristainetos_run_rescue_command(rescue_reason);
+ run_command("run rescue_load_fit rescueboot", 0);
+ } else if (strncmp((char *)data, "DeF", 3) == 0) {
+ memset(data, 0xff, 3);
+ i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)data, 3);
+ printf("\nClear u-boot environment (set back to defaults)\n");
+ run_command("run default_env; saveenv; saveenv", 0);
+ }
+
+ return 0;
+};
+
+static void aristainetos_bootmode_settings(void)
+{
+ struct gpio_desc *desc;
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned int sbmr1 = readl(&psrc->sbmr1);
char *my_bootdelay;
char bootmode = 0;
- struct gpio_desc *desc;
- int x, y;
int ret;
- led_default_state();
- splash_get_pos(&x, &y);
- bmp_display((ulong)&bmp_logo_bitmap[0], x, y);
/*
* Check the boot-source. If booting from NOR Flash,
* disable bootdelay
*/
- desc = gpio_hog_lookup_name("bootsel0");
- if (desc)
+ ret = gpio_hog_lookup_name("bootsel0", &desc);
+ if (!ret)
bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 0;
- desc = gpio_hog_lookup_name("bootsel1");
- if (desc)
+ ret = gpio_hog_lookup_name("bootsel1", &desc);
+ if (!ret)
bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 1;
- desc = gpio_hog_lookup_name("bootsel2");
- if (desc)
+ ret = gpio_hog_lookup_name("bootsel2", &desc);
+ if (!ret)
bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 2;
if (bootmode == 7) {
my_bootdelay = env_get("nor_bootdelay");
- if (my_bootdelay != NULL)
+ if (my_bootdelay)
env_set("bootdelay", my_bootdelay);
else
env_set("bootdelay", "-2");
}
+ if (sbmr1 & 0x40) {
+ env_set("bootmode", "1");
+ printf("SD bootmode jumper set!\n");
+ } else {
+ env_set("bootmode", "0");
+ }
+
/* read out some jumper values*/
ret = gpio_hog_lookup_name("env_reset", &desc);
if (!ret) {
run_command("run rescue_xload_boot", 0);
}
}
+}
+
+#if defined(CONFIG_DM_PMIC_DA9063)
+/*
+ * On the aristainetos2c boards the PMIC needs to be initialized,
+ * because the Ethernet PHY uses a different regulator that is not
+ * setup per hardware default. This does not influence the other versions
+ * as this regulator isn't used there at all.
+ *
+ * Unfortunately we have not yet a interface to setup all
+ * values we need.
+ */
+static int setup_pmic_voltages(void)
+{
+ struct udevice *dev;
+ int off;
+ int ret;
+
+ off = fdt_path_offset(gd->fdt_blob, "pmic0");
+ if (off < 0) {
+ printf("%s: No pmic path offset\n", __func__);
+ return off;
+ }
+
+ ret = uclass_get_device_by_of_offset(UCLASS_PMIC, off, &dev);
+ if (ret) {
+ printf("%s: Could not find PMIC\n", __func__);
+ return ret;
+ }
+
+ pmic_reg_write(dev, DA9063_REG_PAGE_CON, 0x01);
+ pmic_reg_write(dev, DA9063_REG_BPRO_CFG, 0xc1);
+ ret = pmic_reg_read(dev, DA9063_REG_BUCK_ILIM_B);
+ if (ret < 0) {
+ printf("%s: error %d get register\n", __func__, ret);
+ return ret;
+ }
+ ret &= 0xf0;
+ ret |= 0x09;
+ pmic_reg_write(dev, DA9063_REG_BUCK_ILIM_B, ret);
+ pmic_reg_write(dev, DA9063_REG_VBPRO_A, 0x43);
+ pmic_reg_write(dev, DA9063_REG_VBPRO_B, 0xc3);
+
+ return 0;
+}
+#else
+static int setup_pmic_voltages(void)
+{
+ return 0;
+}
+#endif
+
+int board_late_init(void)
+{
+ int x, y;
+
+ led_default_state();
+ splash_get_pos(&x, &y);
+ bmp_display((ulong)&bmp_logo_bitmap[0], x, y);
+
+ aristainetos_bootmode_settings();
+
+ /* eeprom work */
+ aristainetos_eeprom();
/* set board_type */
if (gd->board_type == BOARD_TYPE_4)
else
env_set("board_type", ARI_BT_7);
+ if (setup_pmic_voltages())
+ printf("Error setup PMIC\n");
+
return 0;
}
.vmode = FB_VMODE_NONINTERLACED
}
}
-#if ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3))
+#if ((CONFIG_SYS_BOARD_VERSION == 2) || \
+ (CONFIG_SYS_BOARD_VERSION == 3) || \
+ (CONFIG_SYS_BOARD_VERSION == 4) || \
+ (CONFIG_SYS_BOARD_VERSION == 5))
, {
.bus = -1,
.addr = 0,
};
size_t display_count = ARRAY_SIZE(displays);
+#if defined(CONFIG_MTD_RAW_NAND)
iomux_v3_cfg_t nfc_pads[] = {
MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL),
/* enable apbh clock gating */
setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
}
+#else
+static void setup_gpmi_nand(void)
+{
+}
+#endif
int board_init(void)
{
return 0;
}
-int checkboard(void)
-{
- printf("Board: %s\n", CONFIG_BOARDNAME);
- return 0;
-}
-
int board_fit_config_name_match(const char *name)
{
if (gd->board_type == BOARD_TYPE_4 &&