+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
*
* Modified from coreboot src/soc/intel/baytrail/acpi/southcluster.asl
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
Device (PCI0)
Name(_HID, EISAID("PNP0A08")) /* PCIe */
Name(_CID, EISAID("PNP0A03")) /* PCI */
- Name(_ADR, 0)
+ Name(_UID, 0)
Name(_BBN, 0)
Name(MCRS, ResourceTemplate()
CreateQwordField(MCRS, ^UMEM._MAX, UMAX)
CreateQwordField(MCRS, ^UMEM._LEN, ULEN)
- /* Set base address to 48GB and allocate 16GB for PCI space */
- Store(0xc00000000, UMIN)
- Store(0x400000000, ULEN)
+ /* Set base address to 16GB and allocate 48GB for PCI space */
+ Store(0x400000000, UMIN)
+ Store(0xc00000000, ULEN)
Add(UMIN, Subtract(ULEN, 1), UMAX)
Return (MCRS)