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Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git]
/
arch
/
x86
/
cpu
/
ivybridge
/
sata.c
diff --git
a/arch/x86/cpu/ivybridge/sata.c
b/arch/x86/cpu/ivybridge/sata.c
index 1ce81959e3ff1ece17ea69855895acb3eff4571c..025b20be31bd1137854c2565e3a25650b15081e9 100644
(file)
--- a/
arch/x86/cpu/ivybridge/sata.c
+++ b/
arch/x86/cpu/ivybridge/sata.c
@@
-1,18
+1,18
@@
+// SPDX-License-Identifier: GPL-2.0
/*
* From Coreboot
* Copyright (C) 2008-2009 coresystems GmbH
/*
* From Coreboot
* Copyright (C) 2008-2009 coresystems GmbH
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
*/
#include <common.h>
+#include <ahci.h>
#include <dm.h>
#include <fdtdec.h>
#include <dm.h>
#include <fdtdec.h>
+#include <log.h>
#include <asm/io.h>
#include <asm/pch_common.h>
#include <asm/pci.h>
#include <asm/arch/pch.h>
#include <asm/io.h>
#include <asm/pch_common.h>
#include <asm/pci.h>
#include <asm/arch/pch.h>
-#include <asm/arch/bd82x6x.h>
DECLARE_GLOBAL_DATA_PTR;
DECLARE_GLOBAL_DATA_PTR;
@@
-40,7
+40,7
@@
static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
{
unsigned int port_map, speed_support, port_tx;
const void *blob = gd->fdt_blob;
{
unsigned int port_map, speed_support, port_tx;
const void *blob = gd->fdt_blob;
- int node = dev
->of_offset
;
+ int node = dev
_of_offset(dev)
;
const char *mode;
u32 reg32;
u16 reg16;
const char *mode;
u32 reg32;
u16 reg16;
@@
-54,7
+54,7
@@
static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
if (!mode || !strcmp(mode, "ahci")) {
mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
if (!mode || !strcmp(mode, "ahci")) {
- u
32
abar;
+ u
long
abar;
debug("SATA: Controller in AHCI mode\n");
debug("SATA: Controller in AHCI mode\n");
@@
-73,7
+73,7
@@
static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
/* Initialize AHCI memory-mapped space */
abar = dm_pci_read_bar32(dev, 5);
/* Initialize AHCI memory-mapped space */
abar = dm_pci_read_bar32(dev, 5);
- debug("ABAR: %08
X
\n", abar);
+ debug("ABAR: %08
lx
\n", abar);
/* CAP (HBA Capabilities) : enable power management */
reg32 = readl(abar + 0x00);
reg32 |= 0x0c006000; /* set PSC+SSC+SALP+SSS */
/* CAP (HBA Capabilities) : enable power management */
reg32 = readl(abar + 0x00);
reg32 |= 0x0c006000; /* set PSC+SSC+SALP+SSS */
@@
-191,7
+191,7
@@
static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
static void bd82x6x_sata_enable(struct udevice *dev)
{
const void *blob = gd->fdt_blob;
static void bd82x6x_sata_enable(struct udevice *dev)
{
const void *blob = gd->fdt_blob;
- int node = dev
->of_offset
;
+ int node = dev
_of_offset(dev)
;
unsigned port_map;
const char *mode;
u16 map = 0;
unsigned port_map;
const char *mode;
u16 map = 0;
@@
-209,6
+209,20
@@
static void bd82x6x_sata_enable(struct udevice *dev)
dm_pci_write_config16(dev, 0x90, map);
}
dm_pci_write_config16(dev, 0x90, map);
}
+static int bd82x6x_sata_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+ int ret;
+
+ if (gd->flags & GD_FLG_RELOC) {
+ ret = ahci_bind_scsi(dev, &scsi_dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static int bd82x6x_sata_probe(struct udevice *dev)
{
struct udevice *pch;
static int bd82x6x_sata_probe(struct udevice *dev)
{
struct udevice *pch;
@@
-220,8
+234,12
@@
static int bd82x6x_sata_probe(struct udevice *dev)
if (!(gd->flags & GD_FLG_RELOC))
bd82x6x_sata_enable(dev);
if (!(gd->flags & GD_FLG_RELOC))
bd82x6x_sata_enable(dev);
- else
+ else
{
bd82x6x_sata_init(dev, pch);
bd82x6x_sata_init(dev, pch);
+ ret = ahci_probe_scsi_pci(dev);
+ if (ret)
+ return ret;
+ }
return 0;
}
return 0;
}
@@
-235,5
+253,6
@@
U_BOOT_DRIVER(ahci_ivybridge_drv) = {
.name = "ahci_ivybridge",
.id = UCLASS_AHCI,
.of_match = bd82x6x_ahci_ids,
.name = "ahci_ivybridge",
.id = UCLASS_AHCI,
.of_match = bd82x6x_ahci_ids,
+ .bind = bd82x6x_sata_bind,
.probe = bd82x6x_sata_probe,
};
.probe = bd82x6x_sata_probe,
};