x86: Move acpi_table header to main include/ directory

[oweals/u-boot.git] / arch / x86 / cpu / baytrail / acpi.c

diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 55ed7de781fd4cfcbc1b1d3f03bf13f944165b45..577231097967c2a946cae94670d836e8eb4d60d2 100644 (file)
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -1,21 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
-#include <dm/uclass-internal.h>
-#include <asm/acpi_s3.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_s3.h>
+#include <acpi/acpi_table.h>
 #include <asm/io.h>
-#include <asm/ioapic.h>
-#include <asm/mpspec.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
 #include <asm/arch/iomap.h>
+#include <dm/uclass-internal.h>
 
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
                      void *dsdt)
@@ -75,7 +72,7 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
        fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
        fadt->reset_reg.addrl = IO_PORT_RESET;
        fadt->reset_reg.addrh = 0;
-       fadt->reset_value = SYS_RST | RST_CPU;
+       fadt->reset_value = SYS_RST | RST_CPU | FULL_RST;
 
        fadt->x_firmware_ctl_l = (u32)facs;
        fadt->x_firmware_ctl_h = 0;
@@ -141,33 +138,6 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
        header->checksum = table_compute_checksum(fadt, header->length);
 }
 
-static int acpi_create_madt_irq_overrides(u32 current)
-{
-       struct acpi_madt_irqoverride *irqovr;
-       u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
-       int length = 0;
-
-       irqovr = (void *)current;
-       length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
-       irqovr = (void *)(current + length);
-       length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
-
-       return length;
-}
-
-u32 acpi_fill_madt(u32 current)
-{
-       current += acpi_create_madt_lapics(current);
-
-       current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
-                       io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
-
-       current += acpi_create_madt_irq_overrides(current);
-
-       return current;
-}
-
 void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
 {
        struct udevice *dev;
@@ -197,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
  * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses
  * of these two blocks are programmed by either U-Boot or FSP.
  *
- * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S)
+ * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S)
  * on Intel BayTrail SoC already initializes these two base addresses so
  * we are safe to access these registers here.
  */