Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git] / arch / powerpc / dts / p5040.dtsi
index b6f6c5dd58bb696e51a25092ba0f7f0e6bcd0317..45988574a2e7b3a6ee23bcc742a501548773730d 100644 (file)
@@ -3,7 +3,7 @@
  * P5040 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
                        device_type = "open-pic";
                        clock-frequency = <0x0>;
                };
+
+               usb@210000 {
+                       compatible = "fsl-usb2-mph";
+                       reg = <0x210000 0x1000>;
+                       phy_type = "utmi";
+               };
+
+               usb@211000 {
+                       compatible = "fsl-usb2-dr";
+                       reg = <0x211000 0x1000>;
+                       phy_type = "utmi";
+               };
+
+               sata: sata@220000 {
+                       compatible = "fsl,pq-sata-v2";
+                       reg = <0x220000 0x1000>;
+                       interrupts = <68 0x2 0 0>;
+                       sata-offset = <0x1000>;
+                       sata-number = <2>;
+                       sata-fpdma = <0>;
+               };
+
+               esdhc: esdhc@114000 {
+                       compatible = "fsl,esdhc";
+                       reg = <0x114000 0x1000>;
+                       clock-frequency = <0>;
+               };
+
+               /include/ "qoriq-i2c-0.dtsi"
+               /include/ "qoriq-i2c-1.dtsi"
+       };
+
+       pcie@ffe200000 {
+               compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
+               reg = <0xf 0xfe200000 0x0 0x1000>;   /* registers */
+               law_trgt_if = <0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               device_type = "pci";
+               bus-range = <0x0 0xff>;
+               ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000   /* downstream I/O */
+                         0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */
+       };
+
+       pcie@ffe201000 {
+               compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
+               reg = <0xf 0xfe201000 0x0 0x1000>;   /* registers */
+               law_trgt_if = <1>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               device_type = "pci";
+               bus-range = <0x0 0xff>;
+               ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000   /* downstream I/O */
+                         0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */
+       };
+
+       pcie@ffe202000 {
+               compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
+               reg = <0xf 0xfe202000 0x0 0x1000>;   /* registers */
+               law_trgt_if = <2>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               device_type = "pci";
+               bus-range = <0x0 0xff>;
+               ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000   /* downstream I/O */
+                         0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */
        };
 };