+// SPDX-License-Identifier: GPL-2.0+
/*
* FSL PAMU driver
*
* Copyright 2012-2016 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <log.h>
+#include <linux/bitops.h>
#include <linux/log2.h>
#include <malloc.h>
#include <asm/fsl_pamu.h>
set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
}
- asm volatile("sync" : : : "memory");
+ sync();
/* Mark the ppace entry valid */
ppaace->addr_bitfields |= PAACE_V_VALID;
- asm volatile("sync" : : : "memory");
+ sync();
return 0;
}
out_be32(®s->splah, spaact_lim >> 32);
out_be32(®s->splal, (uint32_t)spaact_lim);
}
- asm volatile("sync" : : : "memory");
+ sync();
base_addr += PAMU_OFFSET;
}
for (i = 0; i < CONFIG_NUM_PAMU; i++) {
setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
PAMU_PCR_PE);
- asm volatile("sync" : : : "memory");
+ sync();
base_addr += PAMU_OFFSET;
}
}
out_be32(®s->splal, 0);
clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
- asm volatile("sync" : : : "memory");
+ sync();
base_addr += PAMU_OFFSET;
}
}
for (i = 0; i < CONFIG_NUM_PAMU; i++) {
clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
- asm volatile("sync" : : : "memory");
+ sync();
base_addr += PAMU_OFFSET;
}
}