Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / powerpc / cpu / mpc85xx / interrupts.c

diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index 409367d158c94a5cccc9635d09ea66154d74ab6a..4ad762683fb9d5f8331691a63f7cb3837e767b38 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2000-2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -7,35 +8,33 @@
  *
  * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
  * Xianghua Xiao (X.Xiao@motorola.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
 #include <common.h>
+#include <irq_func.h>
+#include <log.h>
+#include <time.h>
 #include <watchdog.h>
 #include <command.h>
 #include <asm/processor.h>
 #include <asm/io.h>
+#ifdef CONFIG_POST
+#include <post.h>
+#endif
+#include <asm/ptrace.h>
 
-int interrupt_init_cpu(unsigned int *decrementer_count)
+void interrupt_init_cpu(unsigned *decrementer_count)
 {
-       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC85xx_PIC_ADDR;
+       ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
+
+#ifdef CONFIG_POST
+       /*
+        * The POST word is stored in the PIC's TFRR register which gets
+        * cleared when the PIC is reset.  Save it off so we can restore it
+        * later.
+        */
+       ulong post_word = post_word_load();
+#endif
 
        out_be32(&pic->gcr, MPC85xx_PICGCR_RST);
        while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST)
@@ -46,7 +45,7 @@ int interrupt_init_cpu(unsigned int *decrementer_count)
        *decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
 
        /* PIE is same as DIE, dec interrupt enable */
-       mtspr(SPRN_TCR, TCR_PIE);
+       mtspr(SPRN_TCR, mfspr(SPRN_TCR) | TCR_PIE);
 
 #ifdef CONFIG_INTERRUPTS
        pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
@@ -78,7 +77,9 @@ int interrupt_init_cpu(unsigned int *decrementer_count)
        pic->ctpr=0;            /* 40080 clear current task priority register */
 #endif
 
-       return (0);
+#ifdef CONFIG_POST
+       post_word_store(post_word);
+#endif
 }
 
 /* Install and free a interrupt handler. Not implemented yet. */
@@ -103,7 +104,7 @@ void timer_interrupt_cpu(struct pt_regs *regs)
 
 #if defined(CONFIG_CMD_IRQ)
 /* irqinfo - print information about PCI devices,not implemented. */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
        return 0;
 }