+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
*
* Dave Liu <daveliu@freescale.com>
* based on the contribution of Marian Balakowicz <m8@semihalf.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <irq_func.h>
#include <mpc83xx.h>
#include <command.h>
ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
}
-int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
#ifdef CONFIG_SYS_FSL_DDR2
}
ddr->err_disable = val;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
return 0;
} else if (strcmp(argv[1], "errdetectclr") == 0) {
val = ddr->err_detect;
printf("Incorrect command\n");
ddr->ecc_err_inject = val;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
return 0;
} else if (strcmp(argv[1], "mirror") == 0) {
val = ddr->ecc_err_inject;
/* enable injects */
ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
/* write memory location injecting errors */
ppcDWstore((u32 *) i, pattern);
- __asm__ __volatile__("sync");
+ sync();
/* disable injects */
ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
/* read data, this generates ECC error */
ppcDWload((u32 *) i, ret);
- __asm__ __volatile__("sync");
+ sync();
/* re-initialize memory, double word write the location again,
* generates new ECC code this time */
ppcDWstore((u32 *) i, writeback);
- __asm__ __volatile__("sync");
+ sync();
}
enable_interrupts();
return 0;
/* enable injects */
ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
/* write memory location injecting errors */
*(u32 *) i = 0xfedcba98UL;
- __asm__ __volatile__("sync");
+ sync();
/* sub double word write,
* bus will read-modify-write,
* generates ECC error */
*((u32 *) i + 1) = 0x76543210UL;
- __asm__ __volatile__("sync");
+ sync();
/* disable injects */
ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
+ sync();
+ isync();
/* re-initialize memory,
* double word write the location again,
* generates new ECC code this time */
ppcDWstore((u32 *) i, writeback);
- __asm__ __volatile__("sync");
+ sync();
}
enable_interrupts();
return 0;