common: Move enable/disable_interrupts out of common.h

[oweals/u-boot.git] / arch / powerpc / cpu / mpc83xx / cpu.c

diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index e41988d5fadabde58418bb9514acb5ac59ed2207..c3e25978a807b3d4fa54cd2f3be10713dc6a54d7 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -11,21 +10,25 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
+#include <irq_func.h>
+#include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
 #include <mpc83xx.h>
 #include <asm/processor.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <tsec.h>
 #include <netdev.h>
 #include <fsl_esdhc.h>
-#if defined(CONFIG_BOOTCOUNT_LIMIT) && !defined(CONFIG_MPC831x)
-#include <asm/immap_qe.h>
+#if defined(CONFIG_BOOTCOUNT_LIMIT) && !defined(CONFIG_ARCH_MPC831X)
+#include <linux/immap_qe.h>
 #include <asm/io.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_CPU_MPC83XX
 int checkcpu(void)
 {
        volatile immap_t *immr;
@@ -33,6 +36,7 @@ int checkcpu(void)
        u32 pvr = get_pvr();
        u32 spridr;
        char buf[32];
+       int ret;
        int i;
 
        const struct cpu_type {
@@ -61,6 +65,10 @@ int checkcpu(void)
 
        immr = (immap_t *)CONFIG_SYS_IMMR;
 
+       ret = prt_83xx_rsr();
+       if (ret)
+               return ret;
+
        puts("CPU:   ");
 
        switch (pvr & 0xffff0000) {
@@ -110,7 +118,9 @@ int checkcpu(void)
 
        return 0;
 }
+#endif
 
+#ifndef CONFIG_SYSRESET
 int
 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
@@ -126,18 +136,18 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 #ifdef MPC83xx_RESET
 
        /* Interrupts and MMU off */
-       __asm__ __volatile__ ("mfmsr    %0":"=r" (msr):);
-
-       msr &= ~( MSR_EE | MSR_IR | MSR_DR);
-       __asm__ __volatile__ ("mtmsr    %0"::"r" (msr));
+       msr = mfmsr();
+       msr &= ~(MSR_EE | MSR_IR | MSR_DR);
+       mtmsr(msr);
 
        /* enable Reset Control Reg */
        immap->reset.rpr = 0x52535445;
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
+       sync();
+       isync();
 
        /* confirm Reset Control Reg is enabled */
-       while(!((immap->reset.rcer) & RCER_CRE));
+       while(!((immap->reset.rcer) & RCER_CRE))
+               ;
 
        udelay(200);
 
@@ -149,10 +159,9 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
        immap->reset.rmr = RMR_CSRE;    /* Checkstop Reset enable */
 
        /* Interrupts and MMU off */
-       __asm__ __volatile__ ("mfmsr    %0":"=r" (msr):);
-
+       msr = mfmsr();
        msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
-       __asm__ __volatile__ ("mtmsr    %0"::"r" (msr));
+       mtmsr(msr);
 
        /*
         * Trying to execute the next instruction at a non-existing address
@@ -165,21 +174,17 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 
        return 1;
 }
-
+#endif
 
 /*
  * Get timebase clock frequency (like cpu_clk in Hz)
  */
-
+#ifndef CONFIG_TIMER
 unsigned long get_tbclk(void)
 {
-       ulong tbclk;
-
-       tbclk = (gd->bus_clk + 3L) / 4L;
-
-       return tbclk;
+       return (gd->bus_clk + 3L) / 4L;
 }
-
+#endif
 
 #if defined(CONFIG_WATCHDOG)
 void watchdog_reset (void)
@@ -192,10 +197,11 @@ void watchdog_reset (void)
        immr->wdt.swsrr = 0xaa39;
 
        if (re_enable)
-               enable_interrupts ();
+               enable_interrupts();
 }
 #endif
 
+#ifndef CONFIG_DM_ETH
 /*
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()
@@ -211,6 +217,7 @@ int cpu_eth_init(bd_t *bis)
 #endif
        return 0;
 }
+#endif /* !CONFIG_DM_ETH */
 
 /*
  * Initializes on-chip MMC controllers.
@@ -224,3 +231,21 @@ int cpu_mmc_init(bd_t *bis)
        return 0;
 #endif
 }
+
+void ppcDWstore(unsigned int *addr, unsigned int *value)
+{
+       asm("lfd 1, 0(%1)\n\t"
+           "stfd 1, 0(%0)"
+           :
+           : "r" (addr), "r" (value)
+           : "memory");
+}
+
+void ppcDWload(unsigned int *addr, unsigned int *ret)
+{
+       asm("lfd 1, 0(%0)\n\t"
+           "stfd 1, 0(%1)"
+           :
+           : "r" (addr), "r" (ret)
+           : "memory");
+}