ARM: uniphier: update DRAM init code for LD20 SoC (3rd)

[oweals/u-boot.git] / arch / arm / mach-uniphier / dram / ddrphy-ld20-regs.h

diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
index 0c11b65e46d8c1b29d64abe0d8941bdfcc6569ac..268ba7f47e5cc7dbd8511c810e5a4b5220753098 100644 (file)
--- a/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddrphy-ld20-regs.h
@@ -15,6 +15,7 @@
 #define PHY_MAS_DLY_WIDTH              8
 
 #define PHY_SCL_START                  (0x40 << (PHY_REG_SHIFT))
+#define   PHY_SCL_START_GO_DONE                BIT(28)
 #define PHY_SCL_DATA_0                 (0x41 << (PHY_REG_SHIFT))
 #define PHY_SCL_DATA_1                 (0x42 << (PHY_REG_SHIFT))
 #define PHY_SCL_LATENCY                        (0x43 << (PHY_REG_SHIFT))