ARM: uniphier: de-couple SC macros into base address and offset
[oweals/u-boot.git] / arch / arm / mach-uniphier / clk / clk-dram-pxs2.c
index ad4e83a84a2eeac6ec988e393d505825b6e8f40f..b78bd016721844ae9de7fa776fa3289a67f08206 100644 (file)
@@ -15,18 +15,18 @@ void uniphier_pxs2_dram_clk_init(void)
        u32 tmp;
 
        /* deassert reset */
-       tmp = readl(SC_RSTCTRL4);
+       tmp = readl(sc_base + SC_RSTCTRL4);
        tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 |
               SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
               SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 |
               SC_RSTCTRL4_NRST_UMC30;
-       writel(tmp, SC_RSTCTRL4);
-       readl(SC_RSTCTRL4); /* dummy read */
+       writel(tmp, sc_base + SC_RSTCTRL4);
+       readl(sc_base + SC_RSTCTRL4); /* dummy read */
 
        /* provide clocks */
-       tmp = readl(SC_CLKCTRL4);
+       tmp = readl(sc_base + SC_CLKCTRL4);
        tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 |
               SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0;
-       writel(tmp, SC_CLKCTRL4);
-       readl(SC_CLKCTRL4); /* dummy read */
+       writel(tmp, sc_base + SC_CLKCTRL4);
+       readl(sc_base + SC_CLKCTRL4); /* dummy read */
 }