Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / mach-stm32mp / psci.c

diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
index 1d91b2d324a8dd7a699f58ecaf1a9e87a6de87da..155aa79cd5ed8bc44b83a7bef4e49d68dbfdf0bb 100644 (file)
--- a/arch/arm/mach-stm32mp/psci.c
+++ b/arch/arm/mach-stm32mp/psci.c
@@ -6,10 +6,12 @@
 #include <config.h>
 #include <common.h>
 #include <asm/armv7.h>
+#include <asm/cache.h>
 #include <asm/gic.h>
 #include <asm/io.h>
 #include <asm/psci.h>
 #include <asm/secure.h>
+#include <linux/bitops.h>
 
 #define BOOT_API_A7_CORE0_MAGIC_NUMBER 0xCA7FACE0
 #define BOOT_API_A7_CORE1_MAGIC_NUMBER 0xCA7FACE1
@@ -30,6 +32,22 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
         PSCI_AFFINITY_LEVEL_ON,
         PSCI_AFFINITY_LEVEL_OFF};
 
+static u32 __secure_data cntfrq;
+
+static u32 __secure cp15_read_cntfrq(void)
+{
+       u32 frq;
+
+       asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
+
+       return frq;
+}
+
+static void __secure cp15_write_cntfrq(u32 frq)
+{
+       asm volatile ("mcr p15, 0, %0, c14, c0, 0" : : "r" (frq));
+}
+
 static inline void psci_set_state(int cpu, u8 state)
 {
        psci_state[cpu] = state;
@@ -63,6 +81,9 @@ void __secure psci_arch_cpu_entry(void)
 
        psci_set_state(cpu, PSCI_AFFINITY_LEVEL_ON);
 
+       /* write the saved cntfrq */
+       cp15_write_cntfrq(cntfrq);
+
        /* reset magic in TAMP register */
        writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
 }
@@ -130,6 +151,9 @@ s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
        if (psci_state[cpu] == PSCI_AFFINITY_LEVEL_ON)
                return ARM_PSCI_RET_ALREADY_ON;
 
+       /* read and save cntfrq of current cpu to write on target cpu  */
+       cntfrq = cp15_read_cntfrq();
+
        /* reset magic in TAMP register */
        if (readl(TAMP_BACKUP_MAGIC_NUMBER))
                writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);