Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / mach-socfpga / include / mach / clock_manager.h

diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index b0764977d614bd2a31b0a54c1af2685c36923a60..1f734bcd65ef5df979e65602cc0ec5244b02b01d 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -1,13 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *  Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _CLOCK_MANAGER_H_
 #define _CLOCK_MANAGER_H_
 
-#ifndef __ASSEMBLER__
+phys_addr_t socfpga_get_clkmgr_addr(void);
+
+#ifndef __ASSEMBLY__
 void cm_wait_for_lock(u32 mask);
 int cm_wait_for_fsm(void);
 void cm_print_clock_quick_summary(void);
@@ -15,5 +16,12 @@ void cm_print_clock_quick_summary(void);
 
 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #include <asm/arch/clock_manager_gen5.h>
+#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+#include <asm/arch/clock_manager_arria10.h>
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#include <asm/arch/clock_manager_s10.h>
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include <asm/arch/clock_manager_agilex.h>
 #endif
+
 #endif /* _CLOCK_MANAGER_H_ */