SPDX: Convert all of our single license tags to Linux Kernel style

[oweals/u-boot.git] / arch / arm / mach-at91 / include / mach / sama5_sfr.h

diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-at91/include/mach/sama5_sfr.h
index b040256ba490ea028129db3258a5ed1699ba8794..f9c412f9989a885e35b1728e710450bf372359fd 100644 (file)
--- a/arch/arm/mach-at91/include/mach/sama5_sfr.h
+++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Special Function Register (SFR)
  *
  * Copyright (C) 2014 Atmel
  *                   Bo Shen <voice.shen@atmel.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __SAMA5_SFR_H
@@ -28,10 +27,39 @@ struct atmel_sfr {
        u32 l2cc_hramc; /* 0x58 */
 };
 
+/* Register Mapping*/
+#define AT91_SFR_UTMICKTRIM    0x30    /* UTMI Clock Trimming Register */
+
 /* Bit field in DDRCFG */
 #define ATMEL_SFR_DDRCFG_FDQIEN                0x00010000
 #define ATMEL_SFR_DDRCFG_FDQSIEN       0x00020000
 
+/* Bit field in EBICFG */
+#define AT91_SFR_EBICFG_DRIVE0         (0x3 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_LOW             (0x0 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_MEDIUM          (0x2 << 0)
+#define AT91_SFR_EBICFG_DRIVE0_HIGH            (0x3 << 0)
+#define AT91_SFR_EBICFG_PULL0          (0x3 << 2)
+#define AT91_SFR_EBICFG_PULL0_UP               (0x0 << 2)
+#define AT91_SFR_EBICFG_PULL0_NONE             (0x1 << 2)
+#define AT91_SFR_EBICFG_PULL0_DOWN             (0x3 << 2)
+#define AT91_SFR_EBICFG_SCH0           (0x1 << 4)
+#define AT91_SFR_EBICFG_SCH0_OFF               (0x0 << 4)
+#define AT91_SFR_EBICFG_SCH0_ON                        (0x1 << 4)
+#define AT91_SFR_EBICFG_DRIVE1         (0x3 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_LOW             (0x0 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_MEDIUM          (0x2 << 8)
+#define AT91_SFR_EBICFG_DRIVE1_HIGH            (0x3 << 8)
+#define AT91_SFR_EBICFG_PULL1          (0x3 << 10)
+#define AT91_SFR_EBICFG_PULL1_UP               (0x0 << 10)
+#define AT91_SFR_EBICFG_PULL1_NONE             (0x1 << 10)
+#define AT91_SFR_EBICFG_PULL1_DOWN             (0x3 << 10)
+#define AT91_SFR_EBICFG_SCH1           (0x1 << 12)
+#define AT91_SFR_EBICFG_SCH1_OFF               (0x0 << 12)
+#define AT91_SFR_EBICFG_SCH1_ON                        (0x1 << 12)
+
+#define AT91_UTMICKTRIM_FREQ           GENMASK(1, 0)
+
 /* Bit field in AICREDIR */
 #define ATMEL_SFR_AICREDIR_NSAIC       0x00000001