arm: caches: add DCACHE_DEFAULT_OPTION

[oweals/u-boot.git] / arch / arm / lib / cache-cp15.c

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index b2913e8165a8c85ba473adb4f5abe7a210570364..d15144188bf9f623761f7d7d6a23c1bbfec43556 100644 (file)
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <asm/system.h>
 #include <asm/cache.h>
 #include <linux/compiler.h>
@@ -90,19 +91,16 @@ __weak void dram_bank_mmu_setup(int bank)
        bd_t *bd = gd->bd;
        int     i;
 
+       /* bd->bi_dram is available only after relocation */
+       if ((gd->flags & GD_FLG_RELOC) == 0)
+               return;
+
        debug("%s: bank: %d\n", __func__, bank);
        for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
             i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) +
                 (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT);
-            i++) {
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-               set_section_dcache(i, DCACHE_WRITETHROUGH);
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
-               set_section_dcache(i, DCACHE_WRITEALLOC);
-#else
-               set_section_dcache(i, DCACHE_WRITEBACK);
-#endif
-       }
+            i++)
+               set_section_dcache(i, DCACHE_DEFAULT_OPTION);
 }
 
 /* to activate the MMU we need to set up virtual memory: use 1M areas */
@@ -235,29 +233,35 @@ static void cache_disable(uint32_t cache_bit)
                /* if cache isn;t enabled no need to disable */
                if ((reg & CR_C) != CR_C)
                        return;
+#ifdef CONFIG_SYS_ARM_MMU
                /* if disabling data cache, disable mmu too */
                cache_bit |= CR_M;
+#endif
        }
        reg = get_cr();
 
+#ifdef CONFIG_SYS_ARM_MMU
        if (cache_bit == (CR_C | CR_M))
+#elif defined(CONFIG_SYS_ARM_MPU)
+       if (cache_bit == CR_C)
+#endif
                flush_dcache_all();
        set_cr(reg & ~cache_bit);
 }
 #endif
 
 #if CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
-void icache_enable (void)
+void icache_enable(void)
 {
        return;
 }
 
-void icache_disable (void)
+void icache_disable(void)
 {
        return;
 }
 
-int icache_status (void)
+int icache_status(void)
 {
        return 0;                                       /* always off */
 }
@@ -279,17 +283,17 @@ int icache_status(void)
 #endif
 
 #if CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-void dcache_enable (void)
+void dcache_enable(void)
 {
        return;
 }
 
-void dcache_disable (void)
+void dcache_disable(void)
 {
        return;
 }
 
-int dcache_status (void)
+int dcache_status(void)
 {
        return 0;                                       /* always off */
 }