mtd: nand: support GPMI NAND driver for i.MX8

[oweals/u-boot.git] / arch / arm / include / asm / mach-imx / dma.h

diff --git a/arch/arm/include/asm/mach-imx/dma.h b/arch/arm/include/asm/mach-imx/dma.h
index cb73aaeeb558b071c210f7b995fafa5c9f4808c9..247a91afb06aba09a7eb6d71be3255081e219dd8 100644 (file)
--- a/arch/arm/include/asm/mach-imx/dma.h
+++ b/arch/arm/include/asm/mach-imx/dma.h
@@ -7,6 +7,7 @@
  *
  * Based on code from LTIB:
  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2020 NXP
  */
 
 #ifndef __DMA_H__
@@ -53,7 +54,7 @@ enum {
        MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,
        MXS_MAX_DMA_CHANNELS,
 };
-#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8M))
+#else
 enum {
        MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,
        MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
@@ -95,13 +96,13 @@ enum {
 #define        MXS_DMA_DESC_BYTES_OFFSET       16
 
 struct mxs_dma_cmd {
-       unsigned long           next;
-       unsigned long           data;
+       u32             next;
+       u32             data;
        union {
-               dma_addr_t      address;
-               unsigned long   alternate;
+               u32     address;
+               u32     alternate;
        };
-       unsigned long           pio_words[DMA_PIO_WORDS];
+       u32             pio_words[DMA_PIO_WORDS];
 };
 
 /*
@@ -117,7 +118,7 @@ struct mxs_dma_cmd {
 struct mxs_dma_desc {
        struct mxs_dma_cmd      cmd;
        unsigned int            flags;
-       dma_addr_t              address;
+       u32                     address;
        void                    *buffer;
        struct list_head        node;
 } __aligned(MXS_DMA_ALIGNMENT);