Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / include / asm / global_data.h

diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 4e3ea55e290a19c766017b59241615f7723531d5..7c0905d240eb4fde666929ed2c5d5ee5f6e37894 100644 (file)
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2002-2010
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef        __ASM_GBL_DATA_H
@@ -10,10 +9,14 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
-#if defined(CONFIG_FSL_ESDHC)
+#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
        u32 sdhc_clk;
 #endif
 
+#if defined(CONFIG_FSL_ESDHC)
+       u32 sdhc_per_clk;
+#endif
+
 #if defined(CONFIG_U_QE)
        u32 qe_clk;
        u32 brg_clk;
@@ -32,23 +35,53 @@ struct arch_global_data {
 #endif
        /* "static data" needed by most of timer.c on ARM platforms */
        unsigned long timer_rate_hz;
-       unsigned long tbu;
-       unsigned long tbl;
+       unsigned int tbu;
+       unsigned int tbl;
        unsigned long lastinc;
        unsigned long long timer_reset_value;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
        unsigned long tlb_addr;
        unsigned long tlb_size;
+#if defined(CONFIG_ARM64)
+       unsigned long tlb_fillptr;
+       unsigned long tlb_emerg;
+#endif
+#endif
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+#define MEM_RESERVE_SECURE_SECURED     0x1
+#define MEM_RESERVE_SECURE_MAINTAINED  0x2
+#define MEM_RESERVE_SECURE_ADDR_MASK   (~0x3)
+       /*
+        * Secure memory addr
+        * This variable needs maintenance if the RAM base is not zero,
+        * or if RAM splits into non-consecutive banks. It also has a
+        * flag indicating the secure memory is marked as secure by MMU.
+        * Flags used: 0x1 secured
+        *             0x2 maintained
+        */
+       phys_addr_t secure_ram;
+       unsigned long tlb_allocated;
+#endif
+#ifdef CONFIG_RESV_RAM
+       /*
+        * Reserved RAM for memory resident, eg. Management Complex (MC)
+        * driver which continues to run after U-Boot exits.
+        */
+       phys_addr_t resv_ram;
 #endif
 
-#ifdef CONFIG_OMAP_COMMON
+#ifdef CONFIG_ARCH_OMAP2PLUS
        u32 omap_boot_device;
        u32 omap_boot_mode;
        u8 omap_ch_flags;
 #endif
-#ifdef CONFIG_FSL_LSCH3
+#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
        unsigned long mem2_clk;
 #endif
+
+#ifdef CONFIG_ARCH_IMX8
+       struct udevice *scu_dev;
+#endif
 };
 
 #include <asm-generic/global_data.h>
@@ -84,4 +117,13 @@ static inline gd_t *get_gd(void)
 #endif
 #endif
 
+static inline void set_gd(volatile gd_t *gd_ptr)
+{
+#ifdef CONFIG_ARM64
+       __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
+#else
+       __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
+#endif
+}
+
 #endif /* __ASM_GBL_DATA_H */