command: Remove the cmd_tbl_t typedef

[oweals/u-boot.git] / arch / arm / include / asm / arch-mx6 / clock.h

diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 226a4cde17e0c9b3b528f155ca786f27c7110ec1..8ae49715789c3c532f29327957968280af23f9bd 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -1,14 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2009
  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
+#include <linux/types.h>
 
 #ifdef CONFIG_SYS_MX6_HCLK
 #define MXC_HCLK       CONFIG_SYS_MX6_HCLK
@@ -22,6 +21,8 @@
 #define MXC_CLK32      32768
 #endif
 
+struct cmd_tbl;
+
 enum mxc_clock {
        MXC_ARM_CLK = 0,
        MXC_PER_CLK,
@@ -42,6 +43,14 @@ enum mxc_clock {
        MXC_I2C_CLK,
 };
 
+enum ldb_di_clock {
+       MXC_PLL5_CLK = 0,
+       MXC_PLL2_PFD0_CLK,
+       MXC_PLL2_PFD2_CLK,
+       MXC_MMDC_CH1_CLK,
+       MXC_PLL3_SW_CLK,
+};
+
 enum enet_freq {
        ENET_25MHZ,
        ENET_50MHZ,
@@ -57,7 +66,6 @@ void hab_caam_clock_enable(unsigned char enable);
 void enable_ocotp_clk(unsigned char enable);
 void enable_usboh3_clk(unsigned char enable);
 void enable_uart_clk(unsigned char enable);
-int enable_cspi_clock(unsigned char enable, unsigned spi_num);
 int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
 int enable_sata_clock(void);
 void disable_sata_clock(void);
@@ -65,7 +73,15 @@ int enable_pcie_clock(void);
 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
 int enable_spi_clk(unsigned char enable, unsigned spi_num);
 void enable_ipu_clock(void);
-int enable_fec_anatop_clock(enum enet_freq freq);
+void disable_ipu_clock(void);
+int enable_fec_anatop_clock(int fec_id, enum enet_freq freq);
 void enable_enet_clk(unsigned char enable);
+int enable_lcdif_clock(u32 base_addr, bool enable);
+void enable_qspi_clk(int qspi_num);
 void enable_thermal_clk(void);
+void mxs_set_lcdclk(u32 base_addr, u32 freq);
+void select_ldb_di_clock_source(enum ldb_di_clock clk);
+void enable_eim_clk(unsigned char enable);
+int do_mx6_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+                     char *const argv[]);
 #endif /* __ASM_ARCH_CLOCK_H */