Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / dts / zynq-microzed.dts

diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts
index 842896fbc4635dd793f6902c6c5cfe45e93a43d4..0766398605e4b265c2cb4f0ca179b358e71998e5 100644 (file)
--- a/arch/arm/dts/zynq-microzed.dts
+++ b/arch/arm/dts/zynq-microzed.dts
@@ -1,19 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Xilinx MicroZED board DTS
  *
- * Copyright (C) 2013 Xilinx, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
+ * Copyright (C) 2013 - 2016 Xilinx, Inc.
  */
 /dts-v1/;
 #include "zynq-7000.dtsi"
 
 / {
        model = "Zynq MicroZED Board";
-       compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
+       compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
+
+       aliases {
+               serial0 = &uart1;
+               spi0 = &qspi;
+               mmc0 = &sdhci0;
+       };
 
-       memory {
+       memory@0 {
                device_type = "memory";
                reg = <0 0x40000000>;
        };
+
+       chosen {
+               bootargs = "earlyprintk";
+               stdout-path = "serial0:115200n8";
+       };
+
+       usb_phy0: phy0 {
+               compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
+       };
+};
+
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
+&uart1 {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy>;
+
+       ethernet_phy: ethernet-phy@0 {
+               reg = <0>;
+       };
+};
+
+&sdhci0 {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       dr_mode = "host";
+       usb-phy = <&usb_phy0>;
 };