ARM: dts: sama5d2: Add uart4 definition
[oweals/u-boot.git] / arch / arm / dts / sama5d2.dtsi
index a881d9e05c071772b6b00c54f87e0f728fc73c8e..6fb2cb25f984ea3300167f5e8698892664106741 100644 (file)
@@ -7,6 +7,7 @@
        aliases {
                spi0 = &spi0;
                spi1 = &qspi0;
+               spi2 = &qspi1;
                i2c0 = &i2c0;
                i2c1 = &i2c1;
        };
@@ -29,6 +30,7 @@
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
+               u-boot,dm-pre-reloc;
 
                usb1: ohci@00400000 {
                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                        compatible = "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
+                       u-boot,dm-pre-reloc;
+
+                       hlcdc: hlcdc@f0000000 {
+                               compatible = "atmel,at91sam9x5-hlcdc";
+                               reg = <0xf0000000 0x2000>;
+                               clocks = <&lcdc_clk>;
+                               status = "disabled";
+                       };
 
                        pmc: pmc@f0014000 {
                                compatible = "atmel,sama5d2-pmc", "syscon";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                #interrupt-cells = <1>;
+                               u-boot,dm-pre-reloc;
 
                                main: mainck {
                                        compatible = "atmel,at91sam9x5-clk-main";
                                        #clock-cells = <0>;
+                                       u-boot,dm-pre-reloc;
                                };
 
                                plla: pllack@0 {
@@ -87,6 +99,7 @@
                                        atmel,clk-input-range = <12000000 12000000>;
                                        #atmel,pll-clk-output-range-cells = <4>;
                                        atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
+                                       u-boot,dm-pre-reloc;
                                };
 
                                plladiv: plladivck {
                                        compatible = "atmel,at91sam9x5-clk-utmi";
                                        #clock-cells = <0>;
                                        clocks = <&main>;
+                                       regmap-sfr = <&sfr>;
+                                       u-boot,dm-pre-reloc;
                                };
 
                                mck: masterck {
                                        clocks = <&main>, <&plladiv>, <&utmi>;
                                        atmel,clk-output-range = <124000000 166000000>;
                                        atmel,clk-divisors = <1 2 4 3>;
+                                       u-boot,dm-pre-reloc;
                                };
 
                                h32ck: h32mxck {
                                        #clock-cells = <0>;
                                        compatible = "atmel,sama5d4-clk-h32mx";
                                        clocks = <&mck>;
+                                       u-boot,dm-pre-reloc;
                                };
 
                                usb: usbck {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        clocks = <&h32ck>;
+                                       u-boot,dm-pre-reloc;
 
                                        macb0_clk: macb0_clk@5 {
                                                #clock-cells = <0>;
                                                #clock-cells = <0>;
                                                reg = <18>;
                                                atmel,clk-output-range = <0 83000000>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        flx0_clk: flx0_clk@19 {
                                                #clock-cells = <0>;
                                                reg = <24>;
                                                atmel,clk-output-range = <0 83000000>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        uart1_clk: uart1_clk@25 {
                                                #clock-cells = <0>;
                                                reg = <25>;
                                                atmel,clk-output-range = <0 83000000>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        uart2_clk: uart2_clk@26 {
                                                #clock-cells = <0>;
                                                reg = <26>;
                                                atmel,clk-output-range = <0 83000000>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        uart3_clk: uart3_clk@27 {
                                                #clock-cells = <0>;
                                                reg = <33>;
                                                atmel,clk-output-range = <0 83000000>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        spi1_clk: spi1_clk@34 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        clocks = <&mck>;
+                                       u-boot,dm-pre-reloc;
 
                                        dma0_clk: dma0_clk@6 {
                                                #clock-cells = <0>;
                                        sdmmc0_hclk: sdmmc0_hclk@31 {
                                                #clock-cells = <0>;
                                                reg = <31>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        sdmmc1_hclk: sdmmc1_hclk@32 {
                                                #clock-cells = <0>;
                                                reg = <32>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        lcdc_clk: lcdc_clk@45 {
                                        qspi0_clk: qspi0_clk@52 {
                                                #clock-cells = <0>;
                                                reg = <52>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        qspi1_clk: qspi1_clk@53 {
                                                #clock-cells = <0>;
                                                reg = <53>;
+                                               u-boot,dm-pre-reloc;
                                        };
                                };
 
                                        #size-cells = <0>;
                                        interrupt-parent = <&pmc>;
                                        clocks = <&main>, <&plla>, <&utmi>, <&mck>;
+                                       u-boot,dm-pre-reloc;
 
                                        sdmmc0_gclk: sdmmc0_gclk@31 {
                                                #clock-cells = <0>;
                                                reg = <31>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        sdmmc1_gclk: sdmmc1_gclk@32 {
                                                #clock-cells = <0>;
                                                reg = <32>;
+                                               u-boot,dm-pre-reloc;
                                        };
 
                                        tcb0_gclk: tcb0_gclk@35 {
                                status = "disabled";
                        };
 
+                       qspi1: spi@f0024000 {
+                               compatible = "atmel,sama5d2-qspi";
+                               reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
+                               reg-names = "qspi_base", "qspi_mmap";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&qspi1_clk>;
+                               status = "disabled";
+                       };
+
                        spi0: spi@f8000000 {
                                compatible = "atmel,at91rm9200-spi";
                                reg = <0xf8000000 0x100>;
                                status = "disabled";
                        };
 
+                       uart0: serial@f801c000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xf801c000 0x100>;
+                               clocks = <&uart0_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
                        uart1: serial@f8020000 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xf8020000 0x100>;
+                               clocks = <&uart1_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       uart2: serial@f8024000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xf8024000 0x100>;
+                               clocks = <&uart2_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                status = "disabled";
                        };
 
+                       rstc@f8048000 {
+                               compatible = "atmel,sama5d3-rstc";
+                               reg = <0xf8048000 0x10>;
+                               clocks = <&clk32k>;
+                       };
+
+                       shdwc@f8048010 {
+                               compatible = "atmel,sama5d2-shdwc";
+                               reg = <0xf8048010 0x10>;
+                               clocks = <&clk32k>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               atmel,wakeup-rtc-timer;
+                       };
+
+                       pit: timer@f8048030 {
+                               compatible = "atmel,at91sam9260-pit";
+                               reg = <0xf8048030 0x10>;
+                               clocks = <&h32ck>;
+                       };
+
+                       watchdog@f8048040 {
+                               compatible = "atmel,sama5d4-wdt";
+                               reg = <0xf8048040 0x10>;
+                               clocks = <&clk32k>;
+                               status = "disabled";
+                       };
+
+                       sfr: sfr@f8030000 {
+                               compatible = "atmel,sama5d2-sfr", "syscon";
+                               reg = <0xf8030000 0x98>;
+                       };
+
                        sckc@f8048050 {
                                compatible = "atmel,at91sam9x5-sckc";
                                reg = <0xf8048050 0x4>;
                                status = "disabled";
                        };
 
+                       uart3: serial@fc008000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfc008000 0x100>;
+                               clocks = <&uart3_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       uart4: serial@fc00c000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfc00c000 0x100>;
+                               clocks = <&uart4_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
                        i2c1: i2c@fc028000 {
                                compatible = "atmel,sama5d2-i2c";
                                reg = <0xfc028000 0x100>;
                                clocks = <&pioA_clk>;
                                gpio-controller;
                                #gpio-cells = <2>;
+                               u-boot,dm-pre-reloc;
 
                                pinctrl {
                                        compatible = "atmel,sama5d2-pinctrl";
+                                       u-boot,dm-pre-reloc;
                                };
                        };
                };
        };
+
+       onewire_tm: onewire {
+               compatible = "w1-gpio";
+               status = "disabled";
+       };
 };