Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / dts / fsl-ls1043a-rdb.dts

diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts
index c42cad703484e62736b9d5220021c45910f6b303..6e4ea5b40c7858d99f4023e161f4db16fc20729a 100644 (file)
--- a/arch/arm/dts/fsl-ls1043a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1043a-rdb.dts
@@ -3,6 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  *
  * Copyright (C) 2015, Freescale Semiconductor
+ * Copyright 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
@@ -26,7 +27,7 @@
        dspiflash: n25q12a {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <1000000>; /* input clock */
        };
@@ -98,3 +99,83 @@
 &duart1 {
        status = "okay";
 };
+
+#include "fsl-ls1043-post.dtsi"
+
+&fman0 {
+       ethernet@e0000 {
+               phy-handle = <&qsgmii_phy1>;
+               phy-connection-type = "qsgmii";
+               status = "okay";
+       };
+
+       ethernet@e2000 {
+               phy-handle = <&qsgmii_phy2>;
+               phy-connection-type = "qsgmii";
+               status = "okay";
+       };
+
+       ethernet@e4000 {
+               phy-handle = <&rgmii_phy1>;
+               phy-connection-type = "rgmii-txid";
+               status = "okay";
+       };
+
+       ethernet@e6000 {
+               phy-handle = <&rgmii_phy2>;
+               phy-connection-type = "rgmii-txid";
+               status = "okay";
+       };
+
+       ethernet@e8000 {
+               phy-handle = <&qsgmii_phy3>;
+               phy-connection-type = "qsgmii";
+               status = "okay";
+       };
+
+       ethernet@ea000 {
+               phy-handle = <&qsgmii_phy4>;
+               phy-connection-type = "qsgmii";
+               status = "okay";
+       };
+
+       ethernet@f0000 { /* 10GEC1 */
+               phy-handle = <&aqr105_phy>;
+               phy-connection-type = "xgmii";
+               status = "okay";
+       };
+
+       mdio@fc000 {
+               rgmii_phy1: ethernet-phy@1 {
+                       reg = <0x1>;
+               };
+
+               rgmii_phy2: ethernet-phy@2 {
+                       reg = <0x2>;
+               };
+
+               qsgmii_phy1: ethernet-phy@4 {
+                       reg = <0x4>;
+               };
+
+               qsgmii_phy2: ethernet-phy@5 {
+                       reg = <0x5>;
+               };
+
+               qsgmii_phy3: ethernet-phy@6 {
+                       reg = <0x6>;
+               };
+
+               qsgmii_phy4: ethernet-phy@7 {
+                       reg = <0x7>;
+               };
+       };
+
+       mdio@fd000 {
+               aqr105_phy: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       interrupts = <0 132 4>;
+                       reg = <0x1>;
+               };
+       };
+};