Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git] / arch / arm / dts / fsl-ls1043a-qds.dtsi
index 9611619b59ae6f78bde5eb9026efe6ea052e6272..884bdad196b31aa12e941fab66a5e6334dfaab63 100644 (file)
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  *
  * Copyright (C) 2015, Freescale Semiconductor
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+        X11
  */
 
 /include/ "fsl-ls1043a.dtsi"
@@ -25,7 +24,7 @@
        dflash0: n25q128a {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <1000000>; /* input clock */
                spi-cpol;
                spi-cpha;
@@ -35,7 +34,7 @@
        dflash1: sst25wf040b {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3500000>;
                spi-cpol;
                spi-cpha;
@@ -45,7 +44,7 @@
        dflash2: en25s64 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3500000>;
                spi-cpol;
                spi-cpha;
 };
 
 &qspi {
-       bus-num = <0>;
        status = "okay";
 
-       qflash0: s25fl128s@0 {
+       s25fl128s0: flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
-               spi-max-frequency = <20000000>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <50000000>;
                reg = <0>;
        };
 };
 &lpuart0 {
        status = "okay";
 };
+
+&sata {
+       status = "okay";
+};