0 0 0 0 0 0 0xe 0xe 0xe 0xe
0xe 0xe 0 >;
+ cpm_pcie_reset_pins: cpm-pcie-reset-pins {
+ marvell,pins = < 32 >;
+ marvell,function = <0>;
+ };
+
cpm_xhci_vbus_pins: cpm-xhci-vbus-pins {
marvell,pins = < 47 >;
marvell,function = <0>;
&cpm_pcie0 {
num-lanes = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cpm_pcie_reset_pins>;
+ marvell,reset-gpio = <&cpm_gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
status = "okay";
spi-flash@0 {
- compatible = "jedec,spi-nor", "spi-flash";
+ compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;