ARM: at91: collect SoC sources into mach-at91

[oweals/u-boot.git] / arch / arm / cpu / tegra-common / board.c

diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
index b2e10c6db875a9cc12b74ddb27c6bd9c783c3b0f..b6a84a577478a11374ad3e46ed75bc2c437f59ea 100644 (file)
--- a/arch/arm/cpu/tegra-common/board.c
+++ b/arch/arm/cpu/tegra-common/board.c
@@ -1,30 +1,15 @@
 /*
- *  (C) Copyright 2010,2011
+ *  (C) Copyright 2010-2014
  *  NVIDIA Corporation <www.nvidia.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
+#include <asm/arch/mc.h>
 #include <asm/arch/tegra.h>
 #include <asm/arch-tegra/board.h>
 #include <asm/arch-tegra/pmc.h>
@@ -37,33 +22,33 @@ enum {
        /* UARTs which we can enable */
        UARTA   = 1 << 0,
        UARTB   = 1 << 1,
+       UARTC   = 1 << 2,
        UARTD   = 1 << 3,
-       UART_COUNT = 4,
+       UARTE   = 1 << 4,
+       UART_COUNT = 5,
 };
 
-/*
- * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
- * so we are using this value to identify memory size.
- */
-
+/* Read the RAM size directly from the memory controller */
 unsigned int query_sdram_size(void)
 {
-       struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
-       u32 reg;
-
-       reg = readl(&pmc->pmc_scratch20);
-       debug("pmc->pmc_scratch20 (ODMData) = 0x%08x\n", reg);
-
-       /* bits 31:28 in OdmData are used for RAM size  */
-       switch ((reg) >> 28) {
-       case 1:
-               return 0x10000000;      /* 256 MB */
-       case 2:
-       default:
-               return 0x20000000;      /* 512 MB */
-       case 3:
-               return 0x40000000;      /* 1GB */
-       }
+       struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+       u32 size_mb;
+
+       size_mb = readl(&mc->mc_emem_cfg);
+#if defined(CONFIG_TEGRA20)
+       debug("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", size_mb);
+       size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024);
+#else
+       debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb);
+       size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024 * 1024);
+#endif
+
+#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114)
+       /* External memory limited to 2047 MB due to IROM/HI-VEC */
+       if (size_mb == SZ_2G) size_mb -= SZ_1M;
+#endif
+
+       return size_mb;
 }
 
 int dram_init(void)
@@ -82,19 +67,39 @@ int checkboard(void)
 #endif /* CONFIG_DISPLAY_BOARDINFO */
 
 static int uart_configs[] = {
-#if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
+#if defined(CONFIG_TEGRA20)
+ #if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
        FUNCMUX_UART1_UAA_UAB,
-#elif defined(CONFIG_TEGRA_UARTA_GPU)
+ #elif defined(CONFIG_TEGRA_UARTA_GPU)
        FUNCMUX_UART1_GPU,
-#elif defined(CONFIG_TEGRA_UARTA_SDIO1)
+ #elif defined(CONFIG_TEGRA_UARTA_SDIO1)
        FUNCMUX_UART1_SDIO1,
-#else
+ #else
        FUNCMUX_UART1_IRRX_IRTX,
 #endif
-       FUNCMUX_UART2_IRDA,
+       FUNCMUX_UART2_UAD,
        -1,
        FUNCMUX_UART4_GMC,
        -1,
+#elif defined(CONFIG_TEGRA30)
+       FUNCMUX_UART1_ULPI,     /* UARTA */
+       -1,
+       -1,
+       -1,
+       -1,
+#elif defined(CONFIG_TEGRA114)
+       -1,
+       -1,
+       -1,
+       FUNCMUX_UART4_GMI,      /* UARTD */
+       -1,
+#else  /* Tegra124 */
+       FUNCMUX_UART1_KBC,      /* UARTA */
+       -1,
+       -1,
+       FUNCMUX_UART4_GPIO,     /* UARTD */
+       -1,
+#endif
 };
 
 /**
@@ -109,6 +114,7 @@ static void setup_uarts(int uart_ids)
                PERIPH_ID_UART2,
                PERIPH_ID_UART3,
                PERIPH_ID_UART4,
+               PERIPH_ID_UART5,
        };
        size_t i;
 
@@ -132,8 +138,14 @@ void board_init_uart_f(void)
 #ifdef CONFIG_TEGRA_ENABLE_UARTB
        uart_ids |= UARTB;
 #endif
+#ifdef CONFIG_TEGRA_ENABLE_UARTC
+       uart_ids |= UARTC;
+#endif
 #ifdef CONFIG_TEGRA_ENABLE_UARTD
        uart_ids |= UARTD;
+#endif
+#ifdef CONFIG_TEGRA_ENABLE_UARTE
+       uart_ids |= UARTE;
 #endif
        setup_uarts(uart_ids);
 }