Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / cpu / pxa / pxa2xx.c

diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index b9fd41ece25c41e006b896b9972dc377f0fb816e..ea91d8aaec2bbf90e4c13281271f23a96057285a 100644 (file)
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -10,7 +10,11 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
+#include <init.h>
+#include <irq_func.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <command.h>
@@ -39,13 +43,6 @@ int cleanup_before_linux(void)
        return 0;
 }
 
-void pxa_wait_ticks(int ticks)
-{
-       writel(0, OSCR);
-       while (readl(OSCR) < ticks)
-               asm volatile("" : : : "memory");
-}
-
 inline void writelrb(uint32_t val, uint32_t addr)
 {
        writel(val, addr);
@@ -136,8 +133,11 @@ void pxa2xx_dram_init(void)
 
        writelrb(CONFIG_SYS_MDCNFG_VAL &
                ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG);
+
        /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
-       pxa_wait_ticks(0x300);
+       writel(0, OSCR);
+       while (readl(OSCR) < 0x300)
+               asm volatile("" : : : "memory");
 
        /*
         * 8) Trigger a number (usually 8) refresh cycles by attempting
@@ -286,10 +286,10 @@ void reset_cpu(ulong ignored)
 
 void enable_caches(void)
 {
-#ifndef CONFIG_SYS_ICACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
        icache_enable();
 #endif
-#ifndef CONFIG_SYS_DCACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
        dcache_enable();
 #endif
 }