Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / cpu / pxa / pxa2xx.c

diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index 0c186101eccfaeb21f515e127b5cc297aaa49145..ea91d8aaec2bbf90e4c13281271f23a96057285a 100644 (file)
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2002
  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
@@ -6,31 +7,17 @@
  * (C) Copyright 2002
  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
  */
 
+#include <common.h>
+#include <cpu_func.h>
+#include <init.h>
+#include <irq_func.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <command.h>
-#include <common.h>
-#include <asm/arch/pxa-regs.h>
 
 /* Flush I/D-cache */
 static void cache_flush(void)
@@ -56,13 +43,6 @@ int cleanup_before_linux(void)
        return 0;
 }
 
-void pxa_wait_ticks(int ticks)
-{
-       writel(0, OSCR);
-       while (readl(OSCR) < ticks)
-               asm volatile("" : : : "memory");
-}
-
 inline void writelrb(uint32_t val, uint32_t addr)
 {
        writel(val, addr);
@@ -153,8 +133,11 @@ void pxa2xx_dram_init(void)
 
        writelrb(CONFIG_SYS_MDCNFG_VAL &
                ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG);
+
        /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
-       pxa_wait_ticks(0x300);
+       writel(0, OSCR);
+       while (readl(OSCR) < 0x300)
+               asm volatile("" : : : "memory");
 
        /*
         * 8) Trigger a number (usually 8) refresh cycles by attempting
@@ -244,7 +227,7 @@ void pxa_clock_setup(void)
 {
        writel(CONFIG_SYS_CKEN, CKEN);
        writel(CONFIG_SYS_CCCR, CCCR);
-       asm volatile("mcr       p14, 0, %0, c6, c0, 0" : : "r"(2));
+       asm volatile("mcr       p14, 0, %0, c6, c0, 0" : : "r"(0x0b));
 
        /* enable the 32Khz oscillator for RTC and PowerManager */
        writel(OSCC_OON, OSCC);
@@ -295,7 +278,18 @@ void reset_cpu(ulong ignored)
        tmp = readl(OSCR);
        tmp += 0x1000;
        writel(tmp, OSMR3);
+       writel(MDREFR_SLFRSH, MDREFR);
 
        for (;;)
                ;
 }
+
+void enable_caches(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+       icache_enable();
+#endif
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+       dcache_enable();
+#endif
+}