armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entry

[oweals/u-boot.git] / arch / arm / cpu / armv8 / fsl-layerscape / fdt.c

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index fc9de73bcef4ce3ee58bdb18ead0f2f3113c9c3d..19917b207aba33c7d083194e8b43cf7e4342f3f6 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -135,7 +135,7 @@ remove_psci_node:
 
        fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
                        *boot_code_size);
-#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(EFI_LOADER)
        efi_add_memory_map((uintptr_t)&secondary_boot_code,
                           ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
                           EFI_RESERVED_MEMORY_TYPE, false);
@@ -327,7 +327,7 @@ static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
        memcpy((char *)tmp, p, len);
 
        val = fdt32_to_cpu(tmp[0][6]);
-       if (rev > REV1_0) {
+       if (rev == REV1_0) {
                tmp[1][6] = cpu_to_fdt32(val + 1);
                tmp[2][6] = cpu_to_fdt32(val + 2);
                tmp[3][6] = cpu_to_fdt32(val + 3);
@@ -435,7 +435,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
        do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
                             CONFIG_SYS_CLK_FREQ, 1);
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
        ft_pci_setup(blob, bd);
 #endif