Move strtomhz() to vsprintf.h

[oweals/u-boot.git] / arch / arm / cpu / arm926ejs / mx25 / generic.c

diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 4e9c0b548119d754b0b4b633277ea8e84a62410c..eeb61d0d102028ee57887f32957a19ed61a8a119 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2009 DENX Software Engineering
  * Author: John Rigby <jrigby@gmail.com>
@@ -5,19 +6,19 @@
  * Based on mx27/generic.c:
  *  Copyright (c) 2008 Eric Jarrige <eric.jarrige@armadeus.org>
  *  Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <div64.h>
 #include <netdev.h>
+#include <vsprintf.h>
 #include <asm/io.h>
+#include <asm/arch-imx/cpu.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 
-#ifdef CONFIG_FSL_ESDHC
-#include <fsl_esdhc.h>
+#ifdef CONFIG_FSL_ESDHC_IMX
+#include <fsl_esdhc_imx.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #endif
@@ -57,6 +58,14 @@ static ulong imx_get_mpllclk(void)
        return imx_decode_pll(readl(&ccm->mpctl), fref);
 }
 
+static ulong imx_get_upllclk(void)
+{
+       struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
+       ulong fref = MXC_HCLK;
+
+       return imx_decode_pll(readl(&ccm->upctl), fref);
+}
+
 static ulong imx_get_armclk(void)
 {
        struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
@@ -94,7 +103,8 @@ static ulong imx_get_ipgclk(void)
 static ulong imx_get_perclk(int clk)
 {
        struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-       ulong fref = imx_get_ahbclk();
+       ulong fref = readl(&ccm->mcr) & (1 << clk) ? imx_get_upllclk() :
+                                                    imx_get_ahbclk();
        ulong div;
 
        div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
@@ -103,6 +113,25 @@ static ulong imx_get_perclk(int clk)
        return fref / div;
 }
 
+int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq)
+{
+       struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
+       ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk();
+       ulong div = (fref + freq - 1) / freq;
+
+       if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK)
+               return -EINVAL;
+
+       clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)],
+                       CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk),
+                       div << CCM_PERCLK_SHIFT(clk));
+       if (from_upll)
+               setbits_le32(&ccm->mcr, 1 << clk);
+       else
+               clrbits_le32(&ccm->mcr, 1 << clk);
+       return 0;
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
        if (clk >= MXC_CLK_NUM)
@@ -181,19 +210,11 @@ int print_cpuinfo(void)
                (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
                ((cpurev & 0x8000) ? " unknown" : ""),
                strmhz(buf, imx_get_armclk()));
-       printf("Reset cause: %s\n\n", get_reset_cause());
+       printf("Reset cause: %s\n", get_reset_cause());
        return 0;
 }
 #endif
 
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-#endif
-}
-
 #if defined(CONFIG_FEC_MXC)
 /*
  * Initializes on-chip ethernet controllers.
@@ -213,7 +234,7 @@ int cpu_eth_init(bd_t *bis)
 
 int get_clocks(void)
 {
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC_IMX
 #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
        gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 #else
@@ -223,7 +244,7 @@ int get_clocks(void)
        return 0;
 }
 
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC_IMX
 /*
  * Initializes on-chip MMC controllers.
  * to override, implement board_mmc_init()