+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2009 DENX Software Engineering
* Author: John Rigby <jrigby@gmail.com>
* Based on mx27/generic.c:
* Copyright (c) 2008 Eric Jarrige <eric.jarrige@armadeus.org>
* Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#include <common.h>
+#include <clock_legacy.h>
#include <div64.h>
+#include <init.h>
+#include <net.h>
#include <netdev.h>
+#include <vsprintf.h>
#include <asm/io.h>
+#include <asm/arch-imx/cpu.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC
-#include <fsl_esdhc.h>
+#ifdef CONFIG_FSL_ESDHC_IMX
+#include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
return imx_decode_pll(readl(&ccm->mpctl), fref);
}
+static ulong imx_get_upllclk(void)
+{
+ struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
+ ulong fref = MXC_HCLK;
+
+ return imx_decode_pll(readl(&ccm->upctl), fref);
+}
+
static ulong imx_get_armclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
static ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
- ulong fref = imx_get_ahbclk();
+ ulong fref = readl(&ccm->mcr) & (1 << clk) ? imx_get_upllclk() :
+ imx_get_ahbclk();
ulong div;
div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
return fref / div;
}
+int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq)
+{
+ struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
+ ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk();
+ ulong div = (fref + freq - 1) / freq;
+
+ if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK)
+ return -EINVAL;
+
+ clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)],
+ CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk),
+ div << CCM_PERCLK_SHIFT(clk));
+ if (from_upll)
+ setbits_le32(&ccm->mcr, 1 << clk);
+ else
+ clrbits_le32(&ccm->mcr, 1 << clk);
+ return 0;
+}
+
unsigned int mxc_get_clock(enum mxc_clock clk)
{
if (clk >= MXC_CLK_NUM)
(cpurev & 0xF0) >> 4, (cpurev & 0x0F),
((cpurev & 0x8000) ? " unknown" : ""),
strmhz(buf, imx_get_armclk()));
- printf("Reset cause: %s\n\n", get_reset_cause());
+ printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif
-void enable_caches(void)
-{
-#ifndef CONFIG_SYS_DCACHE_OFF
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-#endif
-}
-
#if defined(CONFIG_FEC_MXC)
/*
* Initializes on-chip ethernet controllers.
int get_clocks(void)
{
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC_IMX
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else
return 0;
}
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC_IMX
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()