be loaded to and run from that address. This option lifts that
restriction, thus allowing the code to be loaded to and executed
from almost any address. This logic relies on the relocation
- information that is embedded into the binary to support U-Boot
+ information that is embedded in the binary to support U-Boot
relocating itself to the top-of-RAM later during execution.
config INIT_SP_RELATIVE
U-Boot typically uses a hard-coded value for the stack pointer
before relocation. Enable this option to instead calculate the
initial SP at run-time. This is useful to avoid hard-coding addresses
- into U-Boot, so that can be loaded and executed at arbitrary
+ into U-Boot, so that it can be loaded and executed at arbitrary
addresses and thus avoid using arbitrary addresses at runtime.
If this option is enabled, the early stack pointer is set to
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
- TEXT_OFFSET value written in to the Linux kernel image header.
+ TEXT_OFFSET value written to the Linux kernel image header.
endif
endif
select SYS_ARM_CACHE_CP15
help
Select if you want MMU-based virtualised addressing space
- support by paged memory management.
+ support via paged memory management.
config SYS_ARM_MPU
bool 'Use the ARM v7 PMSA Compliant MPU'
# startup. Note that in general these options force the workarounds to be
# applied; no CPU-type/version detection exists, unlike the similar options in
# the Linux kernel. Do not set these options unless they apply! Also note that
-# the following can be machine specific errata. These do have ability to
-# provide rudimentary version and machine specific checks, but expect no
+# the following can be machine-specific errata. These do have ability to
+# provide rudimentary version and machine-specific checks, but expect no
# product checks:
# CONFIG_ARM_ERRATA_430973
# CONFIG_ARM_ERRATA_454179
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
+config ARCH_CPU_INIT
+ bool "Enable ARCH_CPU_INIT"
+ help
+ Some architectures require a call to arch_cpu_init().
+ Say Y here to enable it
+
config SYS_ARCH_TIMER
bool "ARM Generic Timer support"
depends on CPU_V7A || ARM64
help
The ARM Generic Timer (aka arch-timer) provides an architected
interface to a timer source on an SoC.
- It is mandantory for ARMv8 implementation and widely available
+ It is mandatory for ARMv8 implementation and widely available
on ARMv7 systems.
config ARM_SMCCC
config SPL_SYS_THUMB_BUILD
bool "Build SPL using the Thumb instruction set"
default y if SYS_THUMB_BUILD
- depends on !ARM64
+ depends on !ARM64 && SPL
help
Use this flag to build SPL using the Thumb instruction set for
ARM architectures. Thumb instruction set provides better code
default y if SYS_THUMB_BUILD
depends on TPL && !ARM64
help
- Use this flag to build SPL using the Thumb instruction set for
+ Use this flag to build TPL using the Thumb instruction set for
ARM architectures. Thumb instruction set provides better code
density. For ARM architectures that support Thumb2 this flag will
result in Thumb2 code generated by GCC.
config SYS_L2CACHE_OFF
bool "L2cache off"
help
- If SoC does not support L2CACHE or one do not want to enable
+ If SoC does not support L2CACHE or one does not want to enable
L2CACHE, choose this option.
config ENABLE_ARM_SOC_BOOT0_HOOK
depends on !ARM64
help
Enable the generation of an optimized version of memcpy.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
config SPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for SPL"
default y if USE_ARCH_MEMCPY
- depends on !ARM64
+ depends on !ARM64 && SPL
help
Enable the generation of an optimized version of memcpy.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
config TPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for TPL"
default y if USE_ARCH_MEMCPY
- depends on !ARM64
+ depends on !ARM64 && TPL
help
Enable the generation of an optimized version of memcpy.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
config USE_ARCH_MEMSET
depends on !ARM64
help
Enable the generation of an optimized version of memset.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
config SPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for SPL"
default y if USE_ARCH_MEMSET
- depends on !ARM64
+ depends on !ARM64 && SPL
help
Enable the generation of an optimized version of memset.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
config TPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for TPL"
default y if USE_ARCH_MEMSET
- depends on !ARM64
+ depends on !ARM64 && TPL
help
Enable the generation of an optimized version of memset.
- Such implementation may be faster under some conditions
+ Such an implementation may be faster under some conditions
but may increase the binary size.
+config SET_STACK_SIZE
+ bool "Enable an option to set max stack size that can be used"
+ default y if ARCH_VERSAL || ARCH_ZYNQMP
+ help
+ This will enable an option to set max stack size that can be
+ used by U-Boot.
+
+config STACK_SIZE
+ hex "Define max stack size that can be used by U-Boot"
+ depends on SET_STACK_SIZE
+ default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
+ help
+ Define Max stack size that can be used by U-Boot so that the
+ initrd_high will be calculated as base stack pointer minus this
+ stack size.
+
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
- default y if ARM64 && !TARGET_THUNDERX_88XX
+ depends on ARM64
+ default y if !TARGET_THUNDERX_88XX
help
This ARM64 system supports AArch32 execution state.
help
Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
ARMv8 Cortex-A57 processors targeting a broad range of networking
- applications
+ applications.
config ARCH_EXYNOS
bool "Samsung EXYNOS"
select ARM64
select DM
select OF_CONTROL
+ select ENABLE_ARM_SOC_BOOT0_HOOK
config ARCH_IMX8M
bool "NXP i.MX8M platform"
select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
- select SYS_FSL_HAS_SEC if SECURE_BOOT
+ select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply MXC_GPIO
config ARCH_MX6
bool "Freescale MX6"
select CPU_V7A
- select SYS_FSL_HAS_SEC if SECURE_BOOT
+ select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
select USB if DISTRO_DEFAULTS
select USB_KEYBOARD if DISTRO_DEFAULTS
select USB_STORAGE if DISTRO_DEFAULTS
- select USE_TINY_PRINTF
+ select SPL_USE_TINY_PRINTF
imply CMD_DM
imply CMD_GPT
- imply CMD_UBI if NAND
+ imply CMD_UBI if MTD_RAW_NAND
imply DISTRO_DEFAULTS
imply FAT_WRITE
imply FIT
select DM_MMC if MMC
select DM_SERIAL
select OF_CONTROL
+ imply BOARD_LATE_INIT
config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7A
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
- imply NAND
+ imply MTD_RAW_NAND
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"
- select BOARD_EARLY_INIT_F if WDT
select CLK
select CLK_ZYNQ
select CPU_V7A
select CLK
select DM
select DM_ETH if NET
+ select DM_MAILBOX
select DM_MMC if MMC
select DM_SERIAL
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
select DM_USB if USB
+ select FIRMWARE
select OF_CONTROL
select SPL_BOARD_INIT if SPL
select SPL_CLK if SPL
+ select SPL_DM_MAILBOX if SPL
+ select SPL_FIRMWARE if SPL
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
+ select ZYNQMP_IPI
imply BOARD_LATE_INIT
imply CMD_DM
imply FAT_WRITE
select PL01X_SERIAL
select SEMIHOSTING
-config TARGET_VEXPRESS64_BASE_FVP_DRAM
- bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
- select ARM64
- select PL01X_SERIAL
- help
- This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
- the default config to allow the user to load the images directly into
- DRAM using model parameters rather than by using semi-hosting to load
- the files from the host filesystem.
-
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
help
- Support for Freescale LS2080A_EMU platform
- The LS2080A Development System (EMULATOR) is a pre silicon
+ Support for Freescale LS2080A_EMU platform.
+ The LS2080A Development System (EMULATOR) is a pre-silicon
development platform that supports the QorIQ LS2080A
Layerscape Architecture processor.
select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
+ select BOARD_LATE_INIT
help
- Support for Freescale LS2080A_SIMU platform
+ Support for Freescale LS2080A_SIMU platform.
The LS2080A Development System (QDS) is a pre silicon
development platform that supports the QorIQ LS2080A
Layerscape Architecture processor.
select SUPPORT_SPL
select FSL_DDR_INTERACTIVE if !SD_BOOT
help
- Support for NXP LS1088AQDS platform
+ Support for NXP LS1088AQDS platform.
The LS1088A Development System (QDS) is a high-performance
development platform that supports the QorIQ LS1088A
Layerscape Architecture processor.
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE if !SPL
help
- Support for Freescale LS2080AQDS platform
+ Support for Freescale LS2080AQDS platform.
The LS2080A Development System (QDS) is a high-performance
development platform that supports the QorIQ LS2080A
Layerscape Architecture processor.
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
+ select BOARD_LATE_INIT
+ select ARCH_MISC_INIT
help
Support for Freescale LS1028AQDS platform
The LS1028A Development System (QDS) is a high-performance
The LS1046A Freeway Board (FRWY) is a high-performance
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.
-config TARGET_H2200
- bool "Support h2200"
- select CPU_PXA
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
imply SPL_SYSRESET
imply CMD_DM
imply CMD_POWEROFF
+ imply OF_LIBFDT_OVERLAY
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
imply USE_PREBOOT
help
select OF_CONTROL
select SPI
select SPL_DM if SPL
- select SPL_SYS_MALLOC_SIMPLE if SPL
select SYS_MALLOC_F
select SYS_THUMB_BUILD if !ARM64
imply ADC
imply FAT_WRITE
imply SARADC_ROCKCHIP
imply SPL_SYSRESET
+ imply SPL_SYS_MALLOC_SIMPLE
imply SYS_NS16550
imply TPL_SYSRESET
imply USB_FUNCTION_FASTBOOT
select OF_CONTROL
imply CMD_DM
+config TARGET_DURIAN
+ bool "Support Phytium Durian Platform"
+ select ARM64
+ help
+ Support for durian platform.
+ It has 2GB Sdram, uart and pcie.
+
endchoice
config ARCH_SUPPORT_TFABOOT
default n
help
Enabling this will make a U-Boot binary that is capable of being
- booted via TF-A.
+ booted via TF-A (Trusted Firmware for Cortex-A).
config TI_SECURE_DEVICE
bool "HS Device Type Support"
source "board/freescale/s32v234evb/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/gumstix/pepper/Kconfig"
-source "board/h2200/Kconfig"
source "board/hisilicon/hikey/Kconfig"
source "board/hisilicon/hikey960/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/xilinx/Kconfig"
source "board/xilinx/zynq/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
+source "board/phytium/durian/Kconfig"
source "arch/arm/Kconfig.debug"
projects / oweals / u-boot.git / blobdiff