// SPDX-License-Identifier: GPL-2.0+ OR X11 /* * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ /dts-v1/; #include "rk3368.dtsi" #include "rk3368-lion-u-boot.dtsi" #include / { model = "Theobroma Systems RK3368-uQ7 SoM"; compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368"; aliases { mmc0 = &emmc; mmc1 = &sdmmc; }; memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; ext_gmac: gmac-clk { compatible = "fixed-clock"; clock-frequency = <125000000>; clock-output-names = "ext_gmac"; #clock-cells = <0>; }; vcc_sys: vcc-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc_sys"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; }; &uart0 { status = "okay"; }; &emmc { status = "okay"; bus-width = <8>; cap-mmc-highspeed; clock-frequency = <150000000>; disable-wp; keep-power-in-suspend; non-removable; num-slots = <1>; vmmc-supply = <&vcc33_io>; vqmmc-supply = <&vcc18_io>; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; }; &sdmmc { status = "okay"; }; &gmac { status = "okay"; phy-supply = <&vcc33_io>; phy-mode = "rgmii"; clock_in_out = "input"; snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <2 10000 50000>; assigned-clocks = <&cru SCLK_MAC>; assigned-clock-parents = <&ext_gmac>; pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; tx_delay = <0x10>; rx_delay = <0x10>; }; &i2c0 { status = "okay"; rk808: pmic@1b { compatible = "rockchip,rk808"; reg = <0x1b>; interrupt-parent = <&gpio0>; interrupts = <5 IRQ_TYPE_LEVEL_LOW>; rockchip,system-power-controller; vcc1-supply = <&vcc_sys>; vcc2-supply = <&vcc_sys>; vcc3-supply = <&vcc_sys>; vcc4-supply = <&vcc_sys>; vcc6-supply = <&vcc_sys>; vcc7-supply = <&vcc_sys>; vcc8-supply = <&vcc_sys>; vcc9-supply = <&vcc_sys>; vcc10-supply = <&vcc_sys>; vcc11-supply = <&vcc_sys>; vcc12-supply = <&vcc_sys>; clock-output-names = "xin32k", "rk808-clkout2"; #clock-cells = <1>; regulators { vdd_cpu: DCDC_REG1 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1500000>; regulator-name = "vdd_cpu"; }; vdd_log: DCDC_REG2 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1500000>; regulator-name = "vdd_log"; }; vcc_ddr: DCDC_REG3 { regulator-always-on; regulator-boot-on; regulator-name = "vcc_ddr"; }; vcc33_io: DCDC_REG4 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc33_io"; }; vcc33_video: LDO_REG2 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc33_video"; }; vdd10_pll: LDO_REG3 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-name = "vdd10_pll"; }; vcc18_io: LDO_REG4 { regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc18_io"; }; vdd10_video: LDO_REG6 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-name = "vdd10_video"; }; vcc18_video: LDO_REG8 { regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc18_video"; }; }; }; }; &uart0 { status = "okay"; }; &spi1 { status = "okay"; #address-cells = <1>; #size-cells = <0>; spiflash: w25q32dw@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <49500000>; spi-cpol; spi-cpha; }; };