drivers/cpu/imx8_cpu.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <cpu.h>
   8 #include <dm.h>
   9 #include <thermal.h>
  10 #include <asm/arch/sci/sci.h>
  11 #include <asm/arch/sys_proto.h>
  12 #include <asm/arch-imx/cpu.h>
  13 #include <asm/armv8/cpu.h>
  14
  15 DECLARE_GLOBAL_DATA_PTR;
  16
  17 struct cpu_imx_platdata {
  18         const char *name;
  19         const char *rev;
  20         const char *type;
  21         u32 cpurev;
  22         u32 freq_mhz;
  23         u32 mpidr;
  24 };
  25
  26 const char *get_imx8_type(u32 imxtype)
  27 {
  28         switch (imxtype) {
  29         case MXC_CPU_IMX8QXP:
  30         case MXC_CPU_IMX8QXP_A0:
  31                 return "QXP";
  32         case MXC_CPU_IMX8QM:
  33                 return "QM";
  34         default:
  35                 return "??";
  36         }
  37 }
  38
  39 const char *get_imx8_rev(u32 rev)
  40 {
  41         switch (rev) {
  42         case CHIP_REV_A:
  43                 return "A";
  44         case CHIP_REV_B:
  45                 return "B";
  46         default:
  47                 return "?";
  48         }
  49 }
  50
  51 const char *get_core_name(struct udevice *dev)
  52 {
  53         if (!device_is_compatible(dev, "arm,cortex-a35"))
  54                 return "A35";
  55         else if (!device_is_compatible(dev, "arm,cortex-a53"))
  56                 return "A53";
  57         else if (!device_is_compatible(dev, "arm,cortex-a72"))
  58                 return "A72";
  59         else
  60                 return "?";
  61 }
  62
  63 #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
  64 static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
  65 {
  66         struct udevice *thermal_dev;
  67         int cpu_tmp, ret;
  68
  69         if (!strcmp(plat->name, "A72"))
  70                 ret = uclass_get_device(UCLASS_THERMAL, 1, &thermal_dev);
  71         else
  72                 ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal_dev);
  73
  74         if (!ret) {
  75                 ret = thermal_get_temp(thermal_dev, &cpu_tmp);
  76                 if (ret)
  77                         return 0xdeadbeef;
  78         } else {
  79                 return 0xdeadbeef;
  80         }
  81
  82         return cpu_tmp;
  83 }
  84 #else
  85 static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
  86 {
  87         return 0;
  88 }
  89 #endif
  90
  91 int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
  92 {
  93         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
  94         int ret, temp;
  95
  96         if (size < 100)
  97                 return -ENOSPC;
  98
  99         ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
 100                        plat->type, plat->rev, plat->name, plat->freq_mhz);
 101
 102         if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
 103                 temp = cpu_imx_get_temp(plat);
 104                 buf = buf + ret;
 105                 size = size - ret;
 106                 if (temp != 0xdeadbeef)
 107                         ret = snprintf(buf, size, " at %dC", temp);
 108                 else
 109                         ret = snprintf(buf, size, " - invalid sensor data");
 110         }
 111
 112         snprintf(buf + ret, size - ret, "\n");
 113
 114         return 0;
 115 }
 116
 117 static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
 118 {
 119         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 120
 121         info->cpu_freq = plat->freq_mhz * 1000;
 122         info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
 123         return 0;
 124 }
 125
 126 static int cpu_imx_get_count(struct udevice *dev)
 127 {
 128         ofnode node;
 129         int num = 0;
 130
 131         ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
 132                 const char *device_type;
 133
 134                 if (!ofnode_is_available(node))
 135                         continue;
 136
 137                 device_type = ofnode_read_string(node, "device_type");
 138                 if (!device_type)
 139                         continue;
 140
 141                 if (!strcmp(device_type, "cpu"))
 142                         num++;
 143         }
 144
 145         return num;
 146 }
 147
 148 static int cpu_imx_get_vendor(struct udevice *dev,  char *buf, int size)
 149 {
 150         snprintf(buf, size, "NXP");
 151         return 0;
 152 }
 153
 154 static int cpu_imx_is_current(struct udevice *dev)
 155 {
 156         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 157
 158         if (plat->mpidr == (read_mpidr() & 0xffff))
 159                 return 1;
 160
 161         return 0;
 162 }
 163
 164 static const struct cpu_ops cpu_imx8_ops = {
 165         .get_desc       = cpu_imx_get_desc,
 166         .get_info       = cpu_imx_get_info,
 167         .get_count      = cpu_imx_get_count,
 168         .get_vendor     = cpu_imx_get_vendor,
 169         .is_current     = cpu_imx_is_current,
 170 };
 171
 172 static const struct udevice_id cpu_imx8_ids[] = {
 173         { .compatible = "arm,cortex-a35" },
 174         { .compatible = "arm,cortex-a53" },
 175         { .compatible = "arm,cortex-a72" },
 176         { }
 177 };
 178
 179 static ulong imx8_get_cpu_rate(struct udevice *dev)
 180 {
 181         ulong rate;
 182         int ret, type;
 183
 184         if (!device_is_compatible(dev, "arm,cortex-a35"))
 185                 type = SC_R_A35;
 186         else if (!device_is_compatible(dev, "arm,cortex-a53"))
 187                 type = SC_R_A53;
 188         else if (!device_is_compatible(dev, "arm,cortex-a72"))
 189                 type = SC_R_A72;
 190         else
 191                 return 0;
 192
 193         ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
 194                                    (sc_pm_clock_rate_t *)&rate);
 195         if (ret) {
 196                 printf("Could not read CPU frequency: %d\n", ret);
 197                 return 0;
 198         }
 199
 200         return rate;
 201 }
 202
 203 static int imx8_cpu_probe(struct udevice *dev)
 204 {
 205         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 206         u32 cpurev;
 207
 208         cpurev = get_cpu_rev();
 209         plat->cpurev = cpurev;
 210         plat->name = get_core_name(dev);
 211         plat->rev = get_imx8_rev(cpurev & 0xFFF);
 212         plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
 213         plat->freq_mhz = imx8_get_cpu_rate(dev) / 1000000;
 214         plat->mpidr = dev_read_addr(dev);
 215         if (plat->mpidr == FDT_ADDR_T_NONE) {
 216                 printf("%s: Failed to get CPU reg property\n", __func__);
 217                 return -EINVAL;
 218         }
 219
 220         return 0;
 221 }
 222
 223 U_BOOT_DRIVER(cpu_imx8_drv) = {
 224         .name           = "imx8x_cpu",
 225         .id             = UCLASS_CPU,
 226         .of_match       = cpu_imx8_ids,
 227         .ops            = &cpu_imx8_ops,
 228         .probe          = imx8_cpu_probe,
 229         .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
 230         .flags          = DM_FLAG_PRE_RELOC,
 231 };