1 // SPDX-License-Identifier: GPL-2.0+
5 * Board functions for EETS PDU001 board
7 * Copyright (C) 2018, EETS GmbH, http://www.eets.ch/
9 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
20 #include <debug_uart.h>
21 #include <dm/ofnode.h>
22 #include <power/pmic.h>
23 #include <power/regulator.h>
24 #include <asm/arch/cpu.h>
25 #include <asm/arch/hardware.h>
26 #include <asm/arch/omap.h>
27 #include <asm/arch/ddr_defs.h>
28 #include <asm/arch/clock.h>
29 #include <asm/arch/gpio.h>
30 #include <asm/arch/mmc_host_def.h>
31 #include <asm/arch/sys_proto.h>
32 #include <asm/arch/mem.h>
38 DECLARE_GLOBAL_DATA_PTR;
40 #define I2C_ADDR_NODE_ID 0x50
41 #define I2C_REG_NODE_ID_BASE 0xfa
42 #define NODE_ID_BYTE_COUNT 6
44 #define I2C_ADDR_LEDS 0x60
45 #define I2C_REG_RUN_LED 0x06
46 #define RUN_LED_OFF 0x0
47 #define RUN_LED_RED 0x1
48 #define RUN_LED_GREEN (0x1 << 2)
50 #define VDD_MPU_REGULATOR "regulator@2"
51 #define VDD_CORE_REGULATOR "regulator@3"
52 #define DEFAULT_CORE_VOLTAGE 1137500
55 * boot device save register
56 * -------------------------
57 * The boot device can be quired by 'spl_boot_device()' in
58 * 'am33xx_spl_board_init'. However it can't be saved in the u-boot
59 * environment here. In turn 'spl_boot_device' can't be called in
60 * 'board_late_init' which allows writing to u-boot environment.
61 * To get the boot device from 'am33xx_spl_board_init' to
62 * 'board_late_init' we therefore use a scratch register from the RTC.
64 #define CONFIG_SYS_RTC_SCRATCH0 0x60
65 #define BOOT_DEVICE_SAVE_REGISTER (RTC_BASE + CONFIG_SYS_RTC_SCRATCH0)
67 #ifdef CONFIG_SPL_BUILD
68 static void save_boot_device(void)
70 *((u32 *)(BOOT_DEVICE_SAVE_REGISTER)) = spl_boot_device();
76 return *((u32 *)(BOOT_DEVICE_SAVE_REGISTER));
79 /* Store the boot device in the environment variable 'boot_device' */
80 static void env_set_boot_device(void)
82 switch (boot_device()) {
83 case BOOT_DEVICE_MMC1: {
84 env_set("boot_device", "emmc");
87 case BOOT_DEVICE_MMC2: {
88 env_set("boot_device", "sdcard");
92 env_set("boot_device", "unknown");
98 static void set_run_led(struct udevice *dev)
100 int val = RUN_LED_OFF;
102 if (IS_ENABLED(CONFIG_RUN_LED_RED))
104 else if (IS_ENABLED(CONFIG_RUN_LED_GREEN))
107 dm_i2c_reg_write(dev, I2C_REG_RUN_LED, val);
110 /* Set 'serial#' to the EUI-48 value of board node ID chip */
111 static void env_set_serial(struct udevice *dev)
114 char serial[2 * NODE_ID_BYTE_COUNT + 1];
117 for (n = 0; n < sizeof(serial); n += 2) {
118 val = dm_i2c_reg_read(dev, I2C_REG_NODE_ID_BASE + n / 2);
119 sprintf(serial + n, "%02X", val);
121 serial[2 * NODE_ID_BYTE_COUNT] = '\0';
122 env_set("serial#", serial);
125 static void set_mpu_and_core_voltage(void)
130 struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
133 * The PDU001 (more precisely the computing module m2) uses a
134 * TPS65910 PMIC. For all MPU frequencies we support we use a CORE
135 * voltage of 1.1375V. For MPU voltage we need to switch based on
136 * the frequency we are running at.
140 * Depending on MPU clock and PG we will need a different VDD
141 * to drive at that speed.
143 sil_rev = readl(&cdev->deviceid) >> 28;
144 mpu_vdd = am335x_get_mpu_vdd(sil_rev, dpll_mpu_opp100.m);
146 /* first update the MPU voltage */
147 if (!regulator_get_by_devname(VDD_MPU_REGULATOR, &dev)) {
148 if (regulator_set_value(dev, mpu_vdd))
149 debug("failed to set MPU voltage\n");
151 debug("invalid MPU voltage ragulator %s\n", VDD_MPU_REGULATOR);
154 /* second update the CORE voltage */
155 if (!regulator_get_by_devname(VDD_CORE_REGULATOR, &dev)) {
156 if (regulator_set_value(dev, DEFAULT_CORE_VOLTAGE))
157 debug("failed to set CORE voltage\n");
159 debug("invalid CORE voltage ragulator %s\n",
164 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
165 static const struct ddr_data ddr2_data = {
166 .datardsratio0 = MT47H128M16RT25E_RD_DQS,
167 .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE,
168 .datawrsratio0 = MT47H128M16RT25E_PHY_WR_DATA,
171 static const struct cmd_control ddr2_cmd_ctrl_data = {
172 .cmd0csratio = MT47H128M16RT25E_RATIO,
173 .cmd1csratio = MT47H128M16RT25E_RATIO,
174 .cmd2csratio = MT47H128M16RT25E_RATIO,
177 static const struct emif_regs ddr2_emif_reg_data = {
178 .sdram_config = MT47H128M16RT25E_EMIF_SDCFG,
179 .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF,
180 .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1,
181 .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2,
182 .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3,
183 .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
186 #define OSC (V_OSCK / 1000000)
187 const struct dpll_params dpll_ddr = {
188 266, OSC - 1, 1, -1, -1, -1, -1};
189 const struct dpll_params dpll_ddr_evm_sk = {
190 303, OSC - 1, 1, -1, -1, -1, -1};
191 const struct dpll_params dpll_ddr_bone_black = {
192 400, OSC - 1, 1, -1, -1, -1, -1};
194 void am33xx_spl_board_init(void)
196 struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
198 /* Get the frequency */
199 dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
201 /* Set CORE Frequencies to OPP100 */
202 do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
204 /* Set MPU Frequency to what we detected now that voltages are set */
205 do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
207 /* save boot device for later use by 'board_late_init' */
211 const struct dpll_params *get_dpll_ddr_params(void)
213 enable_i2c0_pin_mux();
218 void set_mux_conf_regs(void)
220 /* done first by the ROM and afterwards by the pin controller driver */
221 enable_i2c0_pin_mux();
224 const struct ctrl_ioregs ioregs = {
225 .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
226 .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
227 .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
228 .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
229 .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
232 void sdram_init(void)
234 config_ddr(266, &ioregs, &ddr2_data,
235 &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);
237 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
239 #ifdef CONFIG_DEBUG_UART
240 void board_debug_uart_init(void)
242 /* done by pin controller driver if not debugging */
243 enable_uart_pin_mux(CONFIG_DEBUG_UART_BASE);
248 * Basic board specific setup. Pinmux has been handled already.
252 #ifdef CONFIG_HW_WATCHDOG
256 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
260 #ifdef CONFIG_BOARD_LATE_INIT
261 int board_late_init(void)
265 set_mpu_and_core_voltage();
266 env_set_boot_device();
268 /* second I2C bus connects to node ID and front panel LED chip */
269 if (!i2c_get_chip_for_busnum(1, I2C_ADDR_LEDS, 1, &dev))
271 if (!i2c_get_chip_for_busnum(1, I2C_ADDR_NODE_ID, 1, &dev))