1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
13 #include <linux/delay.h>
15 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
16 #define FLASH_BANK_SIZE 0x200000
18 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
20 void flash_print_info(flash_info_t *info)
24 switch (info->flash_id & FLASH_VENDMASK) {
25 case (AMD_MANUFACT & FLASH_VENDMASK):
29 printf ("Unknown Vendor ");
33 switch (info->flash_id & FLASH_TYPEMASK) {
34 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
35 printf ("AM29PL160CB (16Mbit)\n");
38 printf ("Unknown Chip Type\n");
43 printf (" Size: %ld MB in %d Sectors\n",
44 info->size >> 20, info->sector_count);
46 printf (" Sector Start Addresses:");
47 for (i = 0; i < info->sector_count; i++) {
51 printf (" %08lX%s", info->start[i],
52 info->protect[i] ? " (RO)" : " ");
61 unsigned long flash_init(void)
66 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
69 flash_info[i].flash_id =
70 (AMD_MANUFACT & FLASH_VENDMASK) |
71 (AMD_ID_PL160CB & FLASH_TYPEMASK);
72 flash_info[i].size = FLASH_BANK_SIZE;
73 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
74 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
76 flashbase = PHYS_FLASH_1;
78 panic ("configured to many flash banks!\n");
80 for (j = 0; j < flash_info[i].sector_count; j++) {
83 flash_info[i].start[j] = flashbase;
85 if ((j >= 1) && (j <= 2)) {
86 /* 2nd and 3rd are 8 KiB */
87 flash_info[i].start[j] =
88 flashbase + 0x4000 + 0x2000 * (j - 1);
92 flash_info[i].start[j] = flashbase + 0x8000;
94 if ((j >= 4) && (j <= 10)) {
96 flash_info[i].start[j] =
97 flashbase + 0x40000 + 0x40000 * (j -
101 size += flash_info[i].size;
104 flash_protect(FLAG_PROTECT_SET,
105 CONFIG_SYS_FLASH_BASE,
106 CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
112 #define CMD_READ_ARRAY 0x00F0
113 #define CMD_UNLOCK1 0x00AA
114 #define CMD_UNLOCK2 0x0055
115 #define CMD_ERASE_SETUP 0x0080
116 #define CMD_ERASE_CONFIRM 0x0030
117 #define CMD_PROGRAM 0x00A0
118 #define CMD_UNLOCK_BYPASS 0x0020
120 #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
121 #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
123 #define BIT_ERASE_DONE 0x0080
124 #define BIT_RDY_MASK 0x0080
125 #define BIT_PROGRAM_ERROR 0x0020
126 #define BIT_TIMEOUT 0x80000000 /* our flag */
133 int flash_erase(flash_info_t *info, int s_first, int s_last)
136 int iflag, cflag, prot, sect;
141 /* first look for protection bits */
143 if (info->flash_id == FLASH_UNKNOWN)
144 return ERR_UNKNOWN_FLASH_TYPE;
146 if ((s_first < 0) || (s_first > s_last)) {
150 if ((info->flash_id & FLASH_VENDMASK) !=
151 (AMD_MANUFACT & FLASH_VENDMASK)) {
152 return ERR_UNKNOWN_FLASH_VENDOR;
156 for (sect = s_first; sect <= s_last; ++sect) {
157 if (info->protect[sect]) {
162 return ERR_PROTECTED;
165 * Disable interrupts which might cause a timeout
166 * here. Remember that our exception vectors are
167 * at address 0 in the flash, and we don't want a
168 * (ticker) exception to happen while the flash
169 * chip is in programming mode.
172 cflag = icache_status();
174 iflag = disable_interrupts();
178 /* Start erase on unprotected sectors */
179 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
180 printf ("Erasing sector %2d ... ", sect);
182 /* arm simple, non interrupt dependent timer */
183 start = get_timer(0);
185 if (info->protect[sect] == 0) { /* not protected */
187 (volatile u16 *) (info->start[sect]);
189 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
190 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
191 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
193 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
194 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
195 *addr = CMD_ERASE_CONFIRM;
197 /* wait until flash is ready */
204 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
205 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
211 && (result & 0xFFFF) & BIT_ERASE_DONE)
216 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
228 } else { /* it was protected */
230 printf ("protected!\n");
235 printf ("User Interrupt!\n");
238 /* allow flash to settle - wait 10 ms */
250 static int write_word(flash_info_t *info, ulong dest, ulong data)
252 volatile u16 *addr = (volatile u16 *) dest;
260 * Check if Flash is (sufficiently) erased
263 if ((result & data) != data)
264 return ERR_NOT_ERASED;
268 * Disable interrupts which might cause a timeout
269 * here. Remember that our exception vectors are
270 * at address 0 in the flash, and we don't want a
271 * (ticker) exception to happen while the flash
272 * chip is in programming mode.
275 cflag = icache_status();
277 iflag = disable_interrupts();
279 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
280 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
281 MEM_FLASH_ADDR1 = CMD_PROGRAM;
284 /* arm simple, non interrupt dependent timer */
285 start = get_timer(0);
287 /* wait until flash is ready */
293 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
297 if (!chip1 && ((result & 0x80) == (data & 0x80)))
302 *addr = CMD_READ_ARRAY;
304 if (chip1 == ERR || *addr != data)
317 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
323 printf ("unaligned destination not supported\n");
329 printf ("odd transfer sizes not supported\n");
337 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
339 if ((rc = write_word (info, wp - 1, data)) != 0) {
348 data = *((volatile u16 *) src);
349 if ((rc = write_word (info, wp, data)) != 0) {
358 data = (*((volatile u8 *) src) << 8) |
359 *((volatile u8 *) (wp + 1));
360 if ((rc = write_word (info, wp, data)) != 0) {