1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2018 Cisco Systems, Inc.
4 * (C) Copyright 2019 Synamedia
6 * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
13 #include <linux/types.h>
17 #include <asm/bootm.h>
18 #include <mach/timer.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 #define BCMSTB_DATA_SECTION __attribute__((section(".data")))
26 struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
28 phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
30 union reg_value_union {
32 const phys_addr_t *address;
40 u32 get_board_rev(void)
45 void reset_cpu(ulong ignored)
49 int print_cpuinfo(void)
56 if (fdtdec_setup_mem_size_base() != 0)
62 int dram_init_banksize(void)
64 fdtdec_setup_memory_banksize();
67 * On this SoC, U-Boot is running as an ELF file. Change the
68 * relocation address to CONFIG_SYS_TEXT_BASE, so that in
69 * setup_reloc, gd->reloc_off works out to 0, effectively
70 * disabling relocation. Otherwise U-Boot hangs in the setup
71 * instructions just before relocate_code in
72 * arch/arm/lib/crt0.S.
74 gd->relocaddr = CONFIG_SYS_TEXT_BASE;
79 void enable_caches(void)
82 * This port assumes that the prior stage bootloader has
83 * enabled I-cache and D-cache already. Implementing this
84 * function silences the warning in the default function.
90 gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
97 return gd->arch.timer_rate_hz;
100 uint64_t get_ticks(void)
102 gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
103 gd->timebase_l = readl(BCMSTB_TIMER_LOW);
105 return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
108 int board_late_init(void)
110 debug("Arguments from prior stage bootloader:\n");
111 debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
112 debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
113 debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
114 debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
115 debug("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp);
116 debug("Link Register: 0x%x\n", bcmstb_boot_parameters.lr);
117 debug("Assuming timer frequency register at: 0x%p\n",
118 (void *)BCMSTB_TIMER_FREQUENCY);
119 debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
120 debug("Prior stage provided DTB at: 0x%p\n",
121 (void *)prior_stage_fdt_address);
124 * Set fdtcontroladdr in the environment so that scripts can
125 * refer to it, for example, to reuse it for fdtaddr.
127 env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
130 * Do not set machid to the machine identifier value provided
131 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
132 * because we're using a device tree to boot Linux.