board/armltd/vexpress64/vexpress64.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2013
   4  * David Feng <fenghua@phytium.com.cn>
   5  * Sharma Bhupesh <bhupesh.sharma@freescale.com>
   6  */
   7 #include <common.h>
   8 #include <cpu_func.h>
   9 #include <dm.h>
  10 #include <init.h>
  11 #include <malloc.h>
  12 #include <errno.h>
  13 #include <net.h>
  14 #include <netdev.h>
  15 #include <asm/io.h>
  16 #include <linux/compiler.h>
  17 #include <dm/platform_data/serial_pl01x.h>
  18 #include "pcie.h"
  19 #include <asm/armv8/mmu.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 static const struct pl01x_serial_platdata serial_platdata = {
  24         .base = V2M_UART0,
  25         .type = TYPE_PL011,
  26         .clock = CONFIG_PL011_CLOCK,
  27 };
  28
  29 U_BOOT_DEVICE(vexpress_serials) = {
  30         .name = "serial_pl01x",
  31         .platdata = &serial_platdata,
  32 };
  33
  34 static struct mm_region vexpress64_mem_map[] = {
  35         {
  36                 .virt = 0x0UL,
  37                 .phys = 0x0UL,
  38                 .size = 0x80000000UL,
  39                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  40                          PTE_BLOCK_NON_SHARE |
  41                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  42         }, {
  43                 .virt = 0x80000000UL,
  44                 .phys = 0x80000000UL,
  45                 .size = 0xff80000000UL,
  46                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  47                          PTE_BLOCK_INNER_SHARE
  48         }, {
  49                 /* List terminator */
  50                 0,
  51         }
  52 };
  53
  54 struct mm_region *mem_map = vexpress64_mem_map;
  55
  56 /* This function gets replaced by platforms supporting PCIe.
  57  * The replacement function, eg. on Juno, initialises the PCIe bus.
  58  */
  59 __weak void vexpress64_pcie_init(void)
  60 {
  61 }
  62
  63 int board_init(void)
  64 {
  65         vexpress64_pcie_init();
  66         return 0;
  67 }
  68
  69 int dram_init(void)
  70 {
  71         gd->ram_size = PHYS_SDRAM_1_SIZE;
  72         return 0;
  73 }
  74
  75 int dram_init_banksize(void)
  76 {
  77         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  78         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  79 #ifdef PHYS_SDRAM_2
  80         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  81         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  82 #endif
  83
  84         return 0;
  85 }
  86
  87 #ifdef CONFIG_OF_BOARD
  88 #define JUNO_FLASH_SEC_SIZE     (256 * 1024)
  89 static phys_addr_t find_dtb_in_nor_flash(const char *partname)
  90 {
  91         phys_addr_t sector = CONFIG_SYS_FLASH_BASE;
  92         int i;
  93
  94         for (i = 0;
  95              i < CONFIG_SYS_MAX_FLASH_SECT;
  96              i++, sector += JUNO_FLASH_SEC_SIZE) {
  97                 int len = strlen(partname) + 1;
  98                 int offs;
  99                 phys_addr_t imginfo;
 100                 u32 reg;
 101
 102                 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x04);
 103                 /* This makes up the string "HSLFTOOF" flash footer */
 104                 if (reg != 0x464F4F54U)
 105                         continue;
 106                 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x08);
 107                 if (reg != 0x464C5348U)
 108                         continue;
 109
 110                 for (offs = 0; offs < 32; offs += 4, len -= 4) {
 111                         reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x30 + offs);
 112                         if (strncmp(partname + offs, (char *)&reg,
 113                                     len > 4 ? 4 : len))
 114                                 break;
 115
 116                         if (len > 4)
 117                                 continue;
 118
 119                         reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x10);
 120                         imginfo = sector + JUNO_FLASH_SEC_SIZE - 0x30 - reg;
 121                         reg = readl(imginfo + 0x54);
 122
 123                         return CONFIG_SYS_FLASH_BASE +
 124                                reg * JUNO_FLASH_SEC_SIZE;
 125                 }
 126         }
 127
 128         printf("No DTB found\n");
 129
 130         return ~0;
 131 }
 132
 133 void *board_fdt_blob_setup(void)
 134 {
 135         phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
 136
 137         if (fdt_rom_addr == ~0UL)
 138                 return NULL;
 139
 140         return (void *)fdt_rom_addr;
 141 }
 142 #endif
 143
 144 /* Actual reset is done via PSCI. */
 145 void reset_cpu(ulong addr)
 146 {
 147 }
 148
 149 /*
 150  * Board specific ethernet initialization routine.
 151  */
 152 int board_eth_init(bd_t *bis)
 153 {
 154         int rc = 0;
 155 #ifdef CONFIG_SMC91111
 156         rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 157 #endif
 158 #ifdef CONFIG_SMC911X
 159         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 160 #endif
 161         return rc;
 162 }