board/Synology/ds109/ds109.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2009-2012
   4  * Wojciech Dubowik <wojciech.dubowik@neratec.com>
   5  * Luka Perkov <luka@openwrt.org>
   6  */
   7
   8 #include <common.h>
   9 #include <init.h>
  10 #include <miiphy.h>
  11 #include <net.h>
  12 #include <asm/setup.h>
  13 #include <asm/arch/cpu.h>
  14 #include <asm/arch/soc.h>
  15 #include <asm/arch/mpp.h>
  16 #include <linux/delay.h>
  17 #include "ds109.h"
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 int board_early_init_f(void)
  22 {
  23         /*
  24          * default gpio configuration
  25          * There are maximum 64 gpios controlled through 2 sets of registers
  26          * the below configuration configures mainly initial LED status
  27          */
  28         mvebu_config_gpio(DS109_OE_VAL_LOW,
  29                           DS109_OE_VAL_HIGH,
  30                           DS109_OE_LOW, DS109_OE_HIGH);
  31
  32         /* Multi-Purpose Pins Functionality configuration */
  33         static const u32 kwmpp_config[] = {
  34                 MPP0_SPI_SCn,           /* SPI Flash */
  35                 MPP1_SPI_MOSI,
  36                 MPP2_SPI_SCK,
  37                 MPP3_SPI_MISO,
  38                 MPP4_GPIO,
  39                 MPP5_GPO,
  40                 MPP6_SYSRST_OUTn,       /* Reset signal */
  41                 MPP7_GPO,
  42                 MPP8_TW_SDA,            /* I2C */
  43                 MPP9_TW_SCK,            /* I2C */
  44                 MPP10_UART0_TXD,
  45                 MPP11_UART0_RXD,
  46                 MPP12_GPO,
  47                 MPP13_UART1_TXD,
  48                 MPP14_UART1_RXD,
  49                 MPP15_GPIO,
  50                 MPP16_GPIO,
  51                 MPP17_GPIO,
  52                 MPP18_GPO,
  53                 MPP19_GPO,
  54                 MPP20_SATA1_ACTn,
  55                 MPP21_SATA0_ACTn,
  56                 MPP22_GPIO,             /* HDD2 FAIL LED */
  57                 MPP23_GPIO,             /* HDD1 FAIL LED */
  58                 MPP24_GPIO,
  59                 MPP25_GPIO,
  60                 MPP26_GPIO,
  61                 MPP27_GPIO,
  62                 MPP28_GPIO,
  63                 MPP29_GPIO,
  64                 MPP30_GPIO,
  65                 MPP31_GPIO,             /* HDD2 */
  66                 MPP32_GPIO,             /* FAN A */
  67                 MPP33_GPIO,             /* FAN B */
  68                 MPP34_GPIO,             /* FAN C */
  69                 MPP35_GPIO,             /* FAN SENSE */
  70                 MPP36_GPIO,
  71                 MPP37_GPIO,
  72                 MPP38_GPIO,
  73                 MPP39_GPIO,
  74                 MPP40_GPIO,
  75                 MPP41_GPIO,
  76                 MPP42_GPIO,
  77                 MPP43_GPIO,
  78                 MPP44_GPIO,
  79                 MPP45_GPIO,
  80                 MPP46_GPIO,
  81                 MPP47_GPIO,
  82                 MPP48_GPIO,
  83                 MPP49_GPIO,
  84                 0
  85         };
  86         kirkwood_mpp_conf(kwmpp_config, NULL);
  87         return 0;
  88 }
  89
  90 int board_init(void)
  91 {
  92         /* address of boot parameters */
  93         gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  94
  95         return 0;
  96 }
  97
  98 /* Synology reset uses UART */
  99 #include <ns16550.h>
 100 #define SOFTWARE_SHUTDOWN   0x31
 101 #define SOFTWARE_REBOOT     0x43
 102 #define CONFIG_SYS_NS16550_COM2         KW_UART1_BASE
 103 void reset_misc(void)
 104 {
 105         int b_d;
 106         printf("Synology reset...");
 107         udelay(50000);
 108
 109         b_d = ns16550_calc_divisor((NS16550_t)CONFIG_SYS_NS16550_COM2,
 110                 CONFIG_SYS_NS16550_CLK, 9600);
 111         NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM2, b_d);
 112         NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM2, SOFTWARE_REBOOT);
 113 }
 114
 115 /* Support old kernels */
 116 void setup_board_tags(struct tag **in_params)
 117 {
 118         unsigned int boardId;
 119         struct tag *params;
 120         struct tag_mv_uboot *t;
 121         int i;
 122
 123         printf("Synology board tags...");
 124         params = *in_params;
 125         t = (struct tag_mv_uboot *)&params->u;
 126
 127         t->uboot_version = VER_NUM;
 128
 129         boardId = SYNO_DS109_ID;
 130         t->uboot_version |= boardId;
 131
 132         t->tclk = CONFIG_SYS_TCLK;
 133         t->sysclk = CONFIG_SYS_TCLK*2;
 134
 135         t->isusbhost = 1;
 136         for (i = 0; i < 4; i++) {
 137                 memset(t->macaddr[i], 0, sizeof(t->macaddr[i]));
 138                 t->mtu[i] = 0;
 139         }
 140
 141         params->hdr.tag = ATAG_MV_UBOOT;
 142         params->hdr.size = tag_size(tag_mv_uboot);
 143         params = tag_next(params);
 144         *in_params = params;
 145 }
 146
 147 #ifdef CONFIG_RESET_PHY_R
 148 /* Configure and enable MV88E1116 PHY */
 149 void reset_phy(void)
 150 {
 151         u16 reg;
 152         u16 devadr;
 153         char *name = "egiga0";
 154
 155         if (miiphy_set_current_dev(name))
 156                 return;
 157
 158         /* command to read PHY dev address */
 159         if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) {
 160                 printf("Error: 88E1116 could not read PHY dev address\n");
 161                 return;
 162         }
 163
 164         /*
 165          * Enable RGMII delay on Tx and Rx for CPU port
 166          * Ref: sec 4.7.2 of chip datasheet
 167          */
 168         miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
 169         miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
 170         reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
 171         miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
 172         miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
 173
 174         /* reset the phy */
 175         miiphy_reset(name, devadr);
 176
 177         printf("88E1116 Initialized on %s\n", name);
 178 }
 179 #endif /* CONFIG_RESET_PHY_R */