1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
7 #include <asm/arch/cpu.h>
8 #include <asm/arch/soc.h>
15 #include <fdt_support.h>
17 #include <linux/delay.h>
18 #include <linux/libfdt.h>
19 #include <linux/string.h>
21 #include <mvebu/comphy.h>
26 #define MAX_MOX_MODULES 10
28 #define MOX_MODULE_SFP 0x1
29 #define MOX_MODULE_PCI 0x2
30 #define MOX_MODULE_TOPAZ 0x3
31 #define MOX_MODULE_PERIDOT 0x4
32 #define MOX_MODULE_USB3 0x5
33 #define MOX_MODULE_PASSPCI 0x6
35 #define ARMADA_37XX_NB_GPIO_SEL (MVEBU_REGISTER(0x13830))
36 #define ARMADA_37XX_SPI_CTRL (MVEBU_REGISTER(0x10600))
37 #define ARMADA_37XX_SPI_CFG (MVEBU_REGISTER(0x10604))
38 #define ARMADA_37XX_SPI_DOUT (MVEBU_REGISTER(0x10608))
39 #define ARMADA_37XX_SPI_DIN (MVEBU_REGISTER(0x1060c))
41 #define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000"
42 #define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004"
43 #define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
44 #define PCIE_PATH "/soc/pcie@d0070000"
45 #define SFP_PATH "/sfp"
47 DECLARE_GLOBAL_DATA_PTR;
49 #if defined(CONFIG_OF_BOARD_FIXUP)
50 int board_fix_fdt(void *blob)
52 u8 topology[MAX_MOX_MODULES];
57 * SPI driver is not loaded in driver model yet, but we have to find out
58 * if pcie should be enabled in U-Boot's device tree. Therefore we have
59 * to read SPI by reading/writing SPI registers directly
62 writel(0x10df, ARMADA_37XX_SPI_CFG);
63 /* put pin from GPIO to SPI mode */
64 clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
66 setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
68 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
71 for (i = 0; i < MAX_MOX_MODULES; ++i) {
72 writel(0x0, ARMADA_37XX_SPI_DOUT);
74 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
77 topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
78 if (topology[i] == 0xff)
87 clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
89 if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
90 topology[1] == MOX_MODULE_USB3 ||
91 topology[1] == MOX_MODULE_PASSPCI))
96 node = fdt_path_offset(blob, PCIE_PATH);
99 printf("Cannot find PCIe node in U-Boot's device tree!\n");
103 if (fdt_setprop_string(blob, node, "status",
104 enable ? "okay" : "disabled") < 0) {
105 printf("Cannot %s PCIe in U-Boot's device tree!\n",
106 enable ? "enable" : "disable");
110 if (a3700_fdt_fix_pcie_regions(blob) < 0) {
111 printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
121 /* address of boot parameters */
122 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
127 static int mox_do_spi(u8 *in, u8 *out, size_t size)
129 struct spi_slave *slave;
133 ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
134 "spi_generic_drv", "moxtet@1", &dev,
139 ret = spi_claim_bus(slave);
143 ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
145 spi_release_bus(slave);
147 spi_free_slave(slave);
152 static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
155 static u8 topology[MAX_MOX_MODULES - 1];
157 u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
162 *ptopology = topology;
170 memset(din, 0, MAX_MOX_MODULES);
171 memset(dout, 0, MAX_MOX_MODULES);
173 ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
179 else if (din[0] == 0x00)
184 for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
185 topology[i - 1] = din[i] & 0xf;
189 *ptopology = topology;
198 int comphy_update_map(struct comphy_map *serdes_map, int count)
200 int ret, i, size, sfpindex = -1, swindex = -1;
203 ret = mox_get_topology(&topology, &size, NULL);
207 for (i = 0; i < size; ++i) {
208 if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
210 else if ((topology[i] == MOX_MODULE_TOPAZ ||
211 topology[i] == MOX_MODULE_PERIDOT) &&
216 if (sfpindex >= 0 && swindex >= 0) {
217 if (sfpindex < swindex)
218 serdes_map[0].speed = PHY_SPEED_1_25G;
220 serdes_map[0].speed = PHY_SPEED_3_125G;
221 } else if (sfpindex >= 0) {
222 serdes_map[0].speed = PHY_SPEED_1_25G;
223 } else if (swindex >= 0) {
224 serdes_map[0].speed = PHY_SPEED_3_125G;
230 #define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
231 #define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
233 static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
235 bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
237 return bus->read(bus, sw, 0, 1);
240 static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
243 bus->write(bus, sw, 0, 1, val);
244 bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
248 static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
250 sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
251 return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
254 static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
257 sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
261 static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
269 { 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
270 { 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
271 { 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
272 { 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
275 for (i = 0; i < 12; ++i) {
276 for (p = 0; p < peridot; ++p) {
277 sw_led_write(bus, 0x10 + p, regs[i].port, 0,
279 sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
283 sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
292 static void check_switch_address(struct mii_dev *bus, int addr)
294 if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
295 printf("Check of switch MDIO address failed for 0x%02x\n",
299 static int sfp, pci, topaz, peridot, usb, passpci;
300 static int sfp_pos, peridot_pos[3];
301 static int module_count;
303 static int configure_peridots(struct gpio_desc *reset_gpio)
306 u8 dout[MAX_MOX_MODULES];
308 memset(dout, 0, MAX_MOX_MODULES);
310 /* set addresses of Peridot modules */
311 for (i = 0; i < peridot; ++i)
312 dout[module_count - peridot_pos[i]] = (~i) & 3;
315 * if there is a SFP module connected to the last Peridot module, set
316 * the P10_SMODE to 1 for the Peridot module
319 dout[module_count - peridot_pos[i - 1]] |= 1 << 3;
321 dm_gpio_set_value(reset_gpio, 1);
324 ret = mox_do_spi(NULL, dout, module_count + 1);
327 dm_gpio_set_value(reset_gpio, 0);
334 static int get_reset_gpio(struct gpio_desc *reset_gpio)
338 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
340 printf("Cannot find Moxtet bus device node!\n");
344 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
345 reset_gpio, GPIOD_IS_OUT);
347 if (!dm_gpio_is_valid(reset_gpio)) {
348 printf("Cannot find reset GPIO for Moxtet bus!\n");
355 int misc_init_r(void)
360 ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
362 printf("Cannot read data from OTP!\n");
366 if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
367 eth_env_set_enetaddr("ethaddr", mac1);
369 if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
370 eth_env_set_enetaddr("eth1addr", mac2);
375 static void mox_print_info(void)
377 int ret, board_version, ram_size;
381 ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
386 printf("Turris Mox:\n");
387 printf(" Board version: %i\n", board_version);
388 printf(" RAM size: %i MiB\n", ram_size);
389 printf(" Serial Number: %016llX\n", serial_number);
391 pub_key = mox_sp_get_ecdsa_public_key();
393 printf(" ECDSA Public Key: %s\n", pub_key);
395 printf("Cannot read ECDSA Public Key\n");
398 int last_stage_init(void)
404 struct gpio_desc reset_gpio = {};
408 ret = mox_get_topology(&topology, &module_count, &is_sd);
410 printf("Cannot read module topology!\n");
414 printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
417 printf("Module Topology:\n");
419 for (i = 0; i < module_count; ++i) {
420 switch (topology[i]) {
422 printf("% 4i: SFP Module\n", i + 1);
425 printf("% 4i: Mini-PCIe Module\n", i + 1);
427 case MOX_MODULE_TOPAZ:
428 printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
430 case MOX_MODULE_PERIDOT:
431 printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
433 case MOX_MODULE_USB3:
434 printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
436 case MOX_MODULE_PASSPCI:
437 printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
440 printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
444 /* now check if modules are connected in supported mode */
446 for (i = 0; i < module_count; ++i) {
447 switch (topology[i]) {
450 printf("Error: Only one SFP module is supported!\n");
452 printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
460 printf("Error: Only one Mini-PCIe module is supported!\n");
462 printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
463 else if (i && (i != 1 || !passpci))
464 printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
468 case MOX_MODULE_TOPAZ:
470 printf("Error: Only one Topaz module is supported!\n");
471 else if (peridot >= 3)
472 printf("Error: At most two Peridot modules can come before Topaz module!\n");
476 case MOX_MODULE_PERIDOT:
478 printf("Error: Peridot module must come before SFP or Topaz module!\n");
479 } else if (peridot >= 3) {
480 printf("Error: At most three Peridot modules are supported!\n");
482 peridot_pos[peridot] = i;
486 case MOX_MODULE_USB3:
488 printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
490 printf("Error: Only one USB 3.0 module is supported!\n");
491 else if (i && (i != 1 || !passpci))
492 printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
496 case MOX_MODULE_PASSPCI:
498 printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
500 printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
506 /* now configure modules */
508 if (get_reset_gpio(&reset_gpio) < 0)
512 if (configure_peridots(&reset_gpio) < 0) {
513 printf("Cannot configure Peridot modules!\n");
517 dm_gpio_set_value(&reset_gpio, 1);
519 dm_gpio_set_value(&reset_gpio, 0);
523 if (peridot || topaz) {
525 * now check if the addresses are set by reading Scratch & Misc
526 * register 0x70 of Peridot (and potentially Topaz) modules
529 bus = miiphy_get_dev_by_name("neta@30000");
531 printf("Cannot get MDIO bus device!\n");
533 for (i = 0; i < peridot; ++i)
534 check_switch_address(bus, 0x10 + i);
537 check_switch_address(bus, 0x2);
539 sw_blink_leds(bus, peridot, topaz);
548 #if defined(CONFIG_OF_BOARD_SETUP)
550 static int vnode_by_path(void *blob, const char *fmt, va_list ap)
554 vsnprintf(path, 128, fmt, ap);
555 return fdt_path_offset(blob, path);
558 static int node_by_path(void *blob, const char *fmt, ...)
564 res = vnode_by_path(blob, fmt, ap);
570 static int phandle_by_path(void *blob, const char *fmt, ...)
573 int node, phandle, res;
576 node = vnode_by_path(blob, fmt, ap);
582 phandle = fdt_get_phandle(blob, node);
586 phandle = fdt_get_max_phandle(blob);
592 res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
596 res = fdt_setprop_u32(blob, node, "phandle", phandle);
603 static int enable_by_path(void *blob, const char *fmt, ...)
609 node = vnode_by_path(blob, fmt, ap);
615 return fdt_setprop_string(blob, node, "status", "okay");
618 static bool is_topaz(int id)
620 return topaz && id == peridot + topaz - 1;
623 static int switch_addr(int id)
625 return is_topaz(id) ? 0x2 : 0x10 + id;
628 static int setup_switch(void *blob, int id)
630 int res, addr, i, node, phandle;
632 addr = switch_addr(id);
634 /* first enable the switch by setting status = "okay" */
635 res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
640 * now if there are more switches or a SFP module coming after,
641 * enable corresponding ports
643 if (id < peridot + topaz - 1) {
644 res = enable_by_path(blob,
645 MDIO_PATH "/switch%i@%x/ports/port@a",
647 } else if (id == peridot - 1 && !topaz && sfp) {
648 res = enable_by_path(blob,
649 MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
657 if (id >= peridot + topaz - 1)
660 /* finally change link property if needed */
661 node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
666 for (i = id + 1; i < peridot + topaz; ++i) {
667 phandle = phandle_by_path(blob,
668 MDIO_PATH "/switch%i@%x/ports/port@%x",
670 is_topaz(i) ? 5 : 9);
675 res = fdt_setprop_u32(blob, node, "link", phandle);
677 res = fdt_appendprop_u32(blob, node, "link", phandle);
685 static int remove_disabled_nodes(void *blob)
690 offset = fdt_node_offset_by_prop_value(blob, -1, "status",
695 res = fdt_del_node(blob, offset);
703 int ft_board_setup(void *blob, bd_t *bd)
705 int node, phandle, res;
708 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
709 * connected, enable the PCIe node.
711 if (pci || usb || passpci) {
712 node = fdt_path_offset(blob, PCIE_PATH);
716 res = fdt_setprop_string(blob, node, "status", "okay");
720 /* Fix PCIe regions for devices with 4 GB RAM */
721 res = a3700_fdt_fix_pcie_regions(blob);
727 * If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
728 * enable the eth1 node and setup the switches.
730 if (peridot || topaz) {
733 res = enable_by_path(blob, ETH1_PATH);
737 for (i = 0; i < peridot + topaz; ++i) {
738 res = setup_switch(blob, i);
745 * If MOX D (SFP cage module) is connected, enable the SFP node and eth1
746 * node. If there is no Peridot switch between MOX A and MOX D, add link
747 * to the SFP node to eth1 node.
748 * Also enable and configure SFP GPIO controller node.
751 res = enable_by_path(blob, SFP_PATH);
755 res = enable_by_path(blob, ETH1_PATH);
760 phandle = phandle_by_path(blob, SFP_PATH);
764 node = node_by_path(blob, ETH1_PATH);
768 res = fdt_setprop_u32(blob, node, "sfp", phandle);
772 res = fdt_setprop_string(blob, node, "phy-mode",
778 res = enable_by_path(blob, SFP_GPIO_PATH);
785 /* moxtet-sfp is on non-zero position, change default */
786 node = node_by_path(blob, SFP_GPIO_PATH);
790 res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
794 sprintf(newname, "gpio@%x", sfp_pos);
796 res = fdt_set_name(blob, node, newname);
802 fdt_fixup_ethernet(blob);
804 /* Finally remove disabled nodes, as per Rob Herring's request. */
805 remove_disabled_nodes(blob);