1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
13 #include <acpi/acpi_s3.h>
14 #include <asm/cmos_layout.h>
15 #include <asm/early_cmos.h>
17 #include <asm/mrccache.h>
19 #include <asm/processor.h>
20 #include <asm/fsp1/fsp_support.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 static void *fsp_prepare_mrc_cache(void)
26 struct mrc_data_container *cache;
27 struct mrc_region entry;
30 ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
34 cache = mrccache_find_current(&entry);
38 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
39 cache->data, cache->data_size, cache->checksum);
44 int arch_fsp_init(void)
47 int stack = CONFIG_FSP_TEMP_RAM_ADDR;
48 int boot_mode = BOOT_FULL_CONFIG;
49 #ifdef CONFIG_HAVE_ACPI_RESUME
50 int prev_sleep_state = chipset_prev_sleep_state();
51 gd->arch.prev_sleep_state = prev_sleep_state;
54 if (!gd->arch.hob_list) {
55 if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
56 nvs = fsp_prepare_mrc_cache();
60 #ifdef CONFIG_HAVE_ACPI_RESUME
61 if (prev_sleep_state == ACPI_S3) {
63 /* If waking from S3 and no cache then */
64 debug("No MRC cache found in S3 resume path\n");
65 post_code(POST_RESUME_FAILURE);
66 /* Clear Sleep Type */
67 chipset_clear_sleep_state();
69 debug("Rebooting..\n");
70 outb(SYS_RST | RST_CPU, IO_PORT_RESET);
71 /* Should not reach here.. */
72 panic("Reboot System");
76 * DM is not available yet at this point, hence call
77 * CMOS access library which does not depend on DM.
79 stack = cmos_read32(CMOS_FSP_STACK_ADDR);
80 boot_mode = BOOT_ON_S3_RESUME;
84 * The first time we enter here, call fsp_init().
85 * Note the execution does not return to this function,
86 * instead it jumps to fsp_continue().
88 fsp_init(stack, boot_mode, nvs);
91 * The second time we enter here, adjust the size of malloc()
92 * pool before relocation. Given gd->malloc_base was adjusted
93 * after the call to board_init_f_init_reserve() in arch/x86/
94 * cpu/start.S, we should fix up gd->malloc_limit here.
96 gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;