1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017 Intel Corporation.
9 /* Register offsets from the MMIO region base (PCI_BASE_ADDRESS_0) */
10 #include <linux/bitops.h>
11 struct fast_spi_regs {
38 check_member(fast_spi_regs, ptdata, 0xd0);
40 /* Bit definitions for BFPREG (0x00) register */
41 #define SPIBAR_BFPREG_PRB_MASK 0x7fff
42 #define SPIBAR_BFPREG_PRL_SHIFT 16
43 #define SPIBAR_BFPREG_PRL_MASK (0x7fff << SPIBAR_BFPREG_PRL_SHIFT)
45 /* PCI configuration registers */
46 #define SPIBAR_BIOS_CONTROL 0xdc
47 #define SPIBAR_BIOS_CONTROL_WPD BIT(0)
48 #define SPIBAR_BIOS_CONTROL_LOCK_ENABLE BIT(1)
49 #define SPIBAR_BIOS_CONTROL_CACHE_DISABLE BIT(2)
50 #define SPIBAR_BIOS_CONTROL_PREFETCH_ENABLE BIT(3)
51 #define SPIBAR_BIOS_CONTROL_EISS BIT(5)
52 #define SPIBAR_BIOS_CONTROL_BILD BIT(7)
55 * fast_spi_get_bios_mmap() - Get memory map for SPI flash
57 * @pdev: PCI device to use (this is the Fast SPI device)
58 * @map_basep: Returns base memory address for mapped SPI
59 * @map_sizep: Returns size of mapped SPI
60 * @offsetp: Returns start offset of SPI flash where the map works
61 * correctly (offsets before this are not visible)
64 int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep,
68 * fast_spi_get_bios_mmap_regs() - Get memory map for SPI flash given regs
70 * @regs: SPI registers to use
71 * @map_basep: Returns base memory address for mapped SPI
72 * @map_sizep: Returns size of mapped SPI
73 * @offsetp: Returns start offset of SPI flash where the map works
74 * correctly (offsets before this are not visible)
77 int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep,
78 uint *map_sizep, uint *offsetp);
81 * fast_spi_early_init() - Set up a BAR to use SPI early in U-Boot
83 * @pdev: PCI device to use (this is the Fast SPI device)
84 * @mmio_base: MMIO base to use to access registers
86 int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base);
88 #endif /* ASM_FAST_SPI_H */