1 // SPDX-License-Identifier: GPL-2.0
3 * Interrupt Timer Subsystem
5 * Copyright (C) 2017 Intel Corporation.
6 * Copyright (C) 2017 Siemens AG
7 * Copyright 2019 Google LLC
9 * Taken from coreboot itss.c
14 #include <dt-structs.h>
22 struct itss_platdata {
23 #if CONFIG_IS_ENABLED(OF_PLATDATA)
24 /* Put this first since driver model will copy the data here */
25 struct dtd_intel_itss dtplat;
29 /* struct pmc_route - Routing for PMC to GPIO */
36 struct pmc_route *route;
38 u32 irq_snapshot[NUM_IPC_REGS];
41 static int set_polarity(struct udevice *dev, uint irq, bool active_low)
46 if (irq > ITSS_MAX_IRQ)
49 reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * (irq / IRQS_PER_IPC);
50 mask = 1 << (irq % IRQS_PER_IPC);
52 pcr_clrsetbits32(dev, reg, mask, active_low ? mask : 0);
57 #ifndef CONFIG_TPL_BUILD
58 static int snapshot_polarities(struct udevice *dev)
60 struct itss_priv *priv = dev_get_priv(dev);
61 const int start = GPIO_IRQ_START;
62 const int end = GPIO_IRQ_END;
67 reg_start = start / IRQS_PER_IPC;
68 reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
70 for (i = reg_start; i < reg_end; i++) {
71 uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
73 priv->irq_snapshot[i] = pcr_read32(dev, reg);
79 static void show_polarities(struct udevice *dev, const char *msg)
83 log_info("ITSS IRQ Polarities %s:\n", msg);
84 for (i = 0; i < NUM_IPC_REGS; i++) {
85 uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
87 log_info("IPC%d: 0x%08x\n", i, pcr_read32(dev, reg));
91 static int restore_polarities(struct udevice *dev)
93 struct itss_priv *priv = dev_get_priv(dev);
94 const int start = GPIO_IRQ_START;
95 const int end = GPIO_IRQ_END;
100 show_polarities(dev, "Before");
102 reg_start = start / IRQS_PER_IPC;
103 reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
105 for (i = reg_start; i < reg_end; i++) {
111 irq_start = i * IRQS_PER_IPC;
112 irq_end = min(irq_start + IRQS_PER_IPC - 1, ITSS_MAX_IRQ);
119 /* Track bits within the bounds of of the register */
120 irq_start = max(start, irq_start) % IRQS_PER_IPC;
121 irq_end = min(end, irq_end) % IRQS_PER_IPC;
123 /* Create bitmask of the inclusive range of start and end */
124 mask = (((1U << irq_end) - 1) | (1U << irq_end));
125 mask &= ~((1U << irq_start) - 1);
127 reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
128 pcr_clrsetbits32(dev, reg, mask, mask & priv->irq_snapshot[i]);
131 show_polarities(dev, "After");
137 static int route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
139 struct itss_priv *priv = dev_get_priv(dev);
140 struct pmc_route *route;
143 for (i = 0, route = priv->route; i < priv->route_count; i++, route++) {
144 if (pmc_gpe_num == route->pmc)
151 static int itss_bind(struct udevice *dev)
153 /* This is not set with of-platdata, so set it manually */
154 if (CONFIG_IS_ENABLED(OF_PLATDATA))
155 dev->driver_data = X86_IRQT_ITSS;
160 static int itss_ofdata_to_platdata(struct udevice *dev)
162 struct itss_priv *priv = dev_get_priv(dev);
165 #if CONFIG_IS_ENABLED(OF_PLATDATA)
166 struct itss_platdata *plat = dev_get_platdata(dev);
167 struct dtd_intel_itss *dtplat = &plat->dtplat;
170 * It would be nice to do this in the bind() method, but with
171 * of-platdata binding happens in the order that DM finds things in the
172 * linker list (i.e. alphabetical order by driver name). So the GPIO
173 * device may well be bound before its parent (p2sb), and this call
174 * will fail if p2sb is not bound yet.
176 * TODO(sjg@chromium.org): Add a parent pointer to child devices in dtoc
178 ret = p2sb_set_port_id(dev, dtplat->intel_p2sb_port_id);
180 return log_msg_ret("Could not set port id", ret);
181 priv->route = (struct pmc_route *)dtplat->intel_pmc_routes;
182 priv->route_count = ARRAY_SIZE(dtplat->intel_pmc_routes) /
183 sizeof(struct pmc_route);
187 size = dev_read_size(dev, "intel,pmc-routes");
190 priv->route = malloc(size);
193 ret = dev_read_u32_array(dev, "intel,pmc-routes", (u32 *)priv->route,
194 size / sizeof(fdt32_t));
196 return log_msg_ret("Cannot read pmc-routes", ret);
197 priv->route_count = size / sizeof(struct pmc_route);
203 static const struct irq_ops itss_ops = {
204 .route_pmc_gpio_gpe = route_pmc_gpio_gpe,
205 .set_polarity = set_polarity,
206 #ifndef CONFIG_TPL_BUILD
207 .snapshot_polarities = snapshot_polarities,
208 .restore_polarities = restore_polarities,
212 static const struct udevice_id itss_ids[] = {
213 { .compatible = "intel,itss", .data = X86_IRQT_ITSS },
217 U_BOOT_DRIVER(itss_drv) = {
218 .name = "intel_itss",
220 .of_match = itss_ids,
223 .ofdata_to_platdata = itss_ofdata_to_platdata,
224 .platdata_auto_alloc_size = sizeof(struct itss_platdata),
225 .priv_auto_alloc_size = sizeof(struct itss_priv),