1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * P2041 Silicon/SoC Device Tree Source (pre include)
5 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
6 * Copyright 2019-2020 NXP
11 /include/ "e500mc_power_isa.dtsi"
14 compatible = "fsl,P2041";
17 interrupt-parent = <&mpic>;
23 cpu0: PowerPC,e500mc@0 {
26 fsl,portid-mapping = <0x80000000>;
28 cpu1: PowerPC,e500mc@1 {
31 fsl,portid-mapping = <0x40000000>;
33 cpu2: PowerPC,e500mc@2 {
36 fsl,portid-mapping = <0x20000000>;
38 cpu3: PowerPC,e500mc@3 {
41 fsl,portid-mapping = <0x10000000>;
46 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
47 reg = <0xf 0xfe000000 0 0x00001000>;
51 compatible = "simple-bus";
56 #interrupt-cells = <4>;
57 reg = <0x40000 0x40000>;
58 compatible = "fsl,mpic", "chrp,open-pic";
59 device_type = "open-pic";
60 clock-frequency = <0x0>;
64 compatible = "fsl-usb2-mph";
65 reg = <0x210000 0x1000>;
70 compatible = "fsl-usb2-mph";
71 reg = <0x210000 0x1000>;
76 compatible = "fsl,pq-sata-v2";
77 reg = <0x220000 0x1000>;
78 interrupts = <68 0x2 0 0>;
79 sata-offset = <0x1000>;
85 compatible = "fsl,esdhc";
86 reg = <0x114000 0x1000>;
87 clock-frequency = <0>;
90 /include/ "qoriq-i2c-0.dtsi"
91 /include/ "qoriq-i2c-1.dtsi"
95 compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq";
96 reg = <0xf 0xfe200000 0x0 0x1000>; /* registers */
101 bus-range = <0x0 0xff>;
102 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */
103 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */
107 compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq";
108 reg = <0xf 0xfe201000 0x0 0x1000>; /* registers */
110 #address-cells = <3>;
113 bus-range = <0x0 0xff>;
114 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */
115 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */
119 compatible = "fsl,pcie-p2041", "fsl,pcie-fsl-qoriq";
120 reg = <0xf 0xfe202000 0x0 0x1000>; /* registers */
122 #address-cells = <3>;
125 bus-range = <0x0 0xff>;
126 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */
127 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */