1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
4 * Copyright (C) 1995, 1996 Paul M. Antoine
5 * Copyright (C) 1998 Ulf Carlsson
6 * Copyright (C) 1999 Silicon Graphics, Inc.
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2002, 2003, 2004, 2005, 2007 Maciej W. Rozycki
9 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 * Copyright (C) 2014, Imagination Technologies Ltd.
14 #include <asm/ptrace.h>
19 #include <asm/mipsregs.h>
20 #include <asm/addrspace.h>
21 #include <asm/system.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 static unsigned long saved_ebase;
27 static void show_regs(const struct pt_regs *regs)
29 const int field = 2 * sizeof(unsigned long);
30 unsigned int cause = regs->cp0_cause;
35 * Saved main processor registers
37 for (i = 0; i < 32; ) {
41 printf(" %0*lx", field, 0UL);
42 else if (i == 26 || i == 27)
43 printf(" %*s", field, "");
45 printf(" %0*lx", field, regs->regs[i]);
52 printf("Hi : %0*lx\n", field, regs->hi);
53 printf("Lo : %0*lx\n", field, regs->lo);
58 printf("epc : %0*lx (text %0*lx)\n", field, regs->cp0_epc,
59 field, regs->cp0_epc - gd->reloc_off);
60 printf("ra : %0*lx (text %0*lx)\n", field, regs->regs[31],
61 field, regs->regs[31] - gd->reloc_off);
63 printf("Status: %08x\n", (uint32_t) regs->cp0_status);
65 exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
66 printf("Cause : %08x (ExcCode %02x)\n", cause, exccode);
68 if (1 <= exccode && exccode <= 5)
69 printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
71 printf("PrId : %08x\n", read_c0_prid());
74 void do_reserved(const struct pt_regs *regs)
81 void do_ejtag_debug(const struct pt_regs *regs)
83 const int field = 2 * sizeof(unsigned long);
87 depc = read_c0_depc();
88 debug = read_c0_debug();
90 printf("SDBBP EJTAG debug exception: c0_depc = %0*lx, DEBUG = %08x\n",
94 static void set_handler(unsigned long offset, void *addr, unsigned long size)
96 unsigned long ebase = gd->irq_sp;
98 memcpy((void *)(ebase + offset), addr, size);
99 flush_cache(ebase + offset, size);
102 void trap_init(ulong reloc_addr)
104 unsigned long ebase = gd->irq_sp;
106 set_handler(0x180, &except_vec3_generic, 0x80);
107 set_handler(0x280, &except_vec_ejtag_debug, 0x80);
109 saved_ebase = read_c0_ebase() & 0xfffff000;
111 write_c0_ebase(ebase);
112 clear_c0_status(ST0_BEV);
113 execution_hazard_barrier();
116 void trap_restore(void)
118 set_c0_status(ST0_BEV);
119 execution_hazard_barrier();
121 #ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE
122 write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000);
124 write_c0_ebase(saved_ebase);
127 clear_c0_status(ST0_BEV);
128 execution_hazard_barrier();