1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
6 #include <debug_uart.h>
8 #include <linux/serial_reg.h>
10 #include "../sg-regs.h"
11 #include "../soc-info.h"
12 #include "debug-uart.h"
14 #define UNIPHIER_UART_TX 0x00
15 #define UNIPHIER_UART_LCR_MCR 0x10
16 #define UNIPHIER_UART_LSR 0x14
17 #define UNIPHIER_UART_LDR 0x24
19 static void _debug_uart_putc(int c)
21 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
23 while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE))
26 writel(c, base + UNIPHIER_UART_TX);
29 #ifdef CONFIG_SPL_BUILD
30 void sg_set_pinsel(unsigned int pin, unsigned int muxval,
31 unsigned int mux_bits, unsigned int reg_stride)
33 unsigned int shift = pin * mux_bits % 32;
34 void __iomem *reg = sg_base + SG_PINCTRL_BASE +
35 pin * mux_bits / 32 * reg_stride;
36 u32 mask = (1U << mux_bits) - 1;
40 tmp &= ~(mask << shift);
41 tmp |= (mask & muxval) << shift;
45 void sg_set_iectrl(unsigned int pin)
47 unsigned int bit = pin % 32;
48 void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4;
57 void _debug_uart_init(void)
59 #ifdef CONFIG_SPL_BUILD
60 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
63 switch (uniphier_get_soc_id()) {
64 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
66 divisor = uniphier_ld4_debug_uart_init();
69 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
70 case UNIPHIER_PRO4_ID:
71 divisor = uniphier_pro4_debug_uart_init();
74 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
75 case UNIPHIER_SLD8_ID:
76 divisor = uniphier_sld8_debug_uart_init();
79 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
80 case UNIPHIER_PRO5_ID:
81 divisor = uniphier_pro5_debug_uart_init();
84 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
85 case UNIPHIER_PXS2_ID:
86 divisor = uniphier_pxs2_debug_uart_init();
89 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
90 case UNIPHIER_LD6B_ID:
91 divisor = uniphier_ld6b_debug_uart_init();
98 writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
100 writel(divisor, base + UNIPHIER_UART_LDR);