1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
8 #include <linux/delay.h>
11 #include <asm/types.h>
13 #include <asm/arch/powergate.h>
14 #include <asm/arch/tegra.h>
15 #include <asm/arch-tegra/pmc.h>
17 #define PWRGATE_TOGGLE 0x30
18 #define PWRGATE_TOGGLE_START (1 << 8)
20 #define REMOVE_CLAMPING 0x34
22 #define PWRGATE_STATUS 0x38
24 static int tegra_powergate_set(enum tegra_powergate id, bool state)
26 u32 value, mask = state ? (1 << id) : 0, old_mask;
27 unsigned long start, timeout = 25;
29 value = tegra_pmc_readl(PWRGATE_STATUS);
30 old_mask = value & (1 << id);
35 tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);
39 while (get_timer(start) < timeout) {
40 value = tegra_pmc_readl(PWRGATE_STATUS);
41 if ((value & (1 << id)) == mask)
48 int tegra_powergate_power_on(enum tegra_powergate id)
50 return tegra_powergate_set(id, true);
53 int tegra_powergate_power_off(enum tegra_powergate id)
55 return tegra_powergate_set(id, false);
58 static int tegra_powergate_remove_clamping(enum tegra_powergate id)
63 * The REMOVE_CLAMPING register has the bits for the PCIE and VDEC
64 * partitions reversed. This was originally introduced on Tegra20 but
65 * has since been carried forward for backwards-compatibility.
67 if (id == TEGRA_POWERGATE_VDEC)
68 value = 1 << TEGRA_POWERGATE_PCIE;
69 else if (id == TEGRA_POWERGATE_PCIE)
70 value = 1 << TEGRA_POWERGATE_VDEC;
74 tegra_pmc_writel(value, REMOVE_CLAMPING);
79 int tegra_powergate_sequence_power_up(enum tegra_powergate id,
80 enum periph_id periph)
84 reset_set_enable(periph, 1);
86 err = tegra_powergate_power_on(id);
94 err = tegra_powergate_remove_clamping(id);
100 reset_set_enable(periph, 0);