1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
9 /* - phase defines ------------------------------------------------*/
10 #define PHASE_FLASHLAYOUT 0x00
11 #define PHASE_FIRST_USER 0x10
12 #define PHASE_LAST_USER 0xF0
13 #define PHASE_CMD 0xF1
14 #define PHASE_OTP 0xF2
15 #define PHASE_PMIC 0xF4
16 #define PHASE_END 0xFE
17 #define PHASE_RESET 0xFF
18 #define PHASE_DO_RESET 0x1FF
20 #define DEFAULT_ADDRESS 0xFFFFFFFF
25 enum stm32prog_target {
34 enum stm32prog_link_t {
40 struct image_header_s {
48 u32 image_signature[64 / 4];
52 u32 image_entry_point;
59 u32 ecdsa_public_key[64 / 4];
64 #define BL_HEADER_SIZE sizeof(struct raw_header_s)
66 /* partition type in flashlayout file */
67 enum stm32prog_part_type {
74 /* device information */
75 struct stm32prog_dev_t {
76 enum stm32prog_target target;
81 /* list of partition for this device / ordered in offset */
82 struct list_head part_list;
86 /* partition information build from FlashLayout and device */
87 struct stm32prog_part_t {
88 /* FlashLayout information */
91 enum stm32prog_part_type part_type;
92 enum stm32prog_target target;
96 * (16 char in gpt, + 1 for null terminated string
101 enum stm32prog_part_type bin_nb; /* SSBL repeatition */
103 /* information on associated device */
104 struct stm32prog_dev_t *dev; /* pointer to device */
105 s16 part_id; /* partition id in device */
106 int alt_id; /* alt id in usb/dfu */
108 struct list_head list;
111 #define STM32PROG_MAX_DEV 5
112 struct stm32prog_data {
113 /* Layout information */
114 int dev_nb; /* device number*/
115 struct stm32prog_dev_t dev[STM32PROG_MAX_DEV]; /* array of device */
116 int part_nb; /* nb of partition */
117 struct stm32prog_part_t *part_array; /* array of partition */
119 bool fsbl_nor_detected;
121 /* command internal information */
125 struct stm32prog_part_t *cur_part;
127 u8 pmic_part[PMIC_SIZE];
129 /* STM32 header information */
130 struct raw_header_s *header_data;
131 struct image_header_s header;
133 /* SERIAL information */
137 u8 *buffer; /* size = USART_RAM_BUFFER_SIZE*/
141 /* bootm information */
146 extern struct stm32prog_data *stm32prog_data;
149 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset,
150 u8 *buffer, long *size);
151 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset,
152 u8 *buffer, long *size);
153 int stm32prog_otp_start(struct stm32prog_data *data);
156 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset,
157 u8 *buffer, long *size);
158 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset,
159 u8 *buffer, long *size);
160 int stm32prog_pmic_start(struct stm32prog_data *data);
163 u8 stm32prog_header_check(struct raw_header_s *raw_header,
164 struct image_header_s *header);
165 int stm32prog_dfu_init(struct stm32prog_data *data);
166 void stm32prog_next_phase(struct stm32prog_data *data);
167 void stm32prog_do_reset(struct stm32prog_data *data);
169 char *stm32prog_get_error(struct stm32prog_data *data);
171 #define stm32prog_err(args...) {\
172 if (data->phase != PHASE_RESET) { \
173 sprintf(data->error, args); \
174 data->phase = PHASE_RESET; \
175 pr_err("Error: %s\n", data->error); } \
179 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size);
180 int stm32prog_serial_init(struct stm32prog_data *data, int link_dev);
181 bool stm32prog_serial_loop(struct stm32prog_data *data);
182 bool stm32prog_usb_loop(struct stm32prog_data *data, int dev);
183 void stm32prog_clean(struct stm32prog_data *data);