1 // SPDX-License-Identifier: GPL-2.0+
3 * Miscelaneous DaVinci functions.
5 * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
8 * Copyright (C) 2004 Texas Instruments.
17 #include <asm/arch/hardware.h>
19 #include <asm/arch/davinci_misc.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 #ifndef CONFIG_SPL_BUILD
26 /* dram_init must store complete ramsize in gd->ram_size */
27 gd->ram_size = get_ram_size(
28 (void *)CONFIG_SYS_SDRAM_BASE,
29 CONFIG_MAX_RAM_BANK_SIZE);
33 int dram_init_banksize(void)
35 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
36 gd->bd->bi_dram[0].size = gd->ram_size;
42 #ifdef CONFIG_DRIVER_TI_EMAC
44 * Read ethernet MAC address from EEPROM for DVEVM compatible boards.
45 * Returns 1 if found, 0 otherwise.
47 int dvevm_read_mac_address(uint8_t *buf)
49 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
50 /* Read MAC address. */
51 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00,
52 CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6))
55 /* Check that MAC address is valid. */
56 if (!is_valid_ethaddr(buf))
62 printf("Read from EEPROM @ 0x%02x failed\n",
63 CONFIG_SYS_I2C_EEPROM_ADDR);
65 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
71 * Set the mii mode as MII or RMII
73 void davinci_emac_mii_mode_sel(int mode_sel)
77 val = readl(&davinci_syscfg_regs->cfgchip3);
82 writel(val, &davinci_syscfg_regs->cfgchip3);
86 * If there is no MAC address in the environment, then it will be initialized
87 * (silently) from the value in the EEPROM.
89 void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
91 uint8_t env_enetaddr[6];
94 ret = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
97 * There is no MAC address in the environment, so we
98 * initialize it from the value in the EEPROM.
100 debug("### Setting environment from EEPROM MAC address = "
103 ret = !eth_env_set_enetaddr("ethaddr", rom_enetaddr);
106 printf("Failed to set mac address from EEPROM: %d\n", ret);
108 #endif /* CONFIG_DRIVER_TI_EMAC */
113 * Mask all IRQs by clearing the global enable and setting
114 * the enable clear for all the 90 interrupts.
116 writel(0, &davinci_aintc_regs->ger);
118 writel(0, &davinci_aintc_regs->hier);
120 writel(0xffffffff, &davinci_aintc_regs->ecr1);
121 writel(0xffffffff, &davinci_aintc_regs->ecr2);
122 writel(0xffffffff, &davinci_aintc_regs->ecr3);
126 * Enable PSC for various peripherals.
128 int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
133 for (i = 0; i < n_items; i++)
134 lpsc_on(item[i].lpsc_no);