2 * Copyright (C) 2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __ARM_PSCI_H__
19 #define __ARM_PSCI_H__
22 #include <linux/bitops.h>
25 #define ARM_PSCI_VER_1_0 (0x00010000)
26 #define ARM_PSCI_VER_0_2 (0x00000002)
28 /* PSCI 0.1 interface */
29 #define ARM_PSCI_FN_BASE 0x95c1ba5e
30 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
32 #define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0)
33 #define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1)
34 #define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2)
35 #define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3)
37 #define ARM_PSCI_RET_SUCCESS 0
38 #define ARM_PSCI_RET_NI (-1)
39 #define ARM_PSCI_RET_INVAL (-2)
40 #define ARM_PSCI_RET_DENIED (-3)
41 #define ARM_PSCI_RET_ALREADY_ON (-4)
42 #define ARM_PSCI_RET_ON_PENDING (-5)
43 #define ARM_PSCI_RET_INTERNAL_FAILURE (-6)
44 #define ARM_PSCI_RET_NOT_PRESENT (-7)
45 #define ARM_PSCI_RET_DISABLED (-8)
46 #define ARM_PSCI_RET_INVALID_ADDRESS (-9)
48 /* PSCI 0.2 interface */
49 #define ARM_PSCI_0_2_FN_BASE 0x84000000
50 #define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
52 #define ARM_PSCI_0_2_FN64_BASE 0xC4000000
53 #define ARM_PSCI_0_2_FN64(n) (ARM_PSCI_0_2_FN64_BASE + (n))
55 #define ARM_PSCI_0_2_FN_PSCI_VERSION ARM_PSCI_0_2_FN(0)
56 #define ARM_PSCI_0_2_FN_CPU_SUSPEND ARM_PSCI_0_2_FN(1)
57 #define ARM_PSCI_0_2_FN_CPU_OFF ARM_PSCI_0_2_FN(2)
58 #define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
59 #define ARM_PSCI_0_2_FN_AFFINITY_INFO ARM_PSCI_0_2_FN(4)
60 #define ARM_PSCI_0_2_FN_MIGRATE ARM_PSCI_0_2_FN(5)
61 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE ARM_PSCI_0_2_FN(6)
62 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN(7)
63 #define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
64 #define ARM_PSCI_0_2_FN_SYSTEM_RESET ARM_PSCI_0_2_FN(9)
66 #define ARM_PSCI_0_2_FN64_CPU_SUSPEND ARM_PSCI_0_2_FN64(1)
67 #define ARM_PSCI_0_2_FN64_CPU_ON ARM_PSCI_0_2_FN64(3)
68 #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
69 #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
70 #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
71 #define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
73 /* PSCI 1.0 interface */
74 #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
75 #define ARM_PSCI_1_0_FN_CPU_FREEZE ARM_PSCI_0_2_FN(11)
76 #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN(12)
77 #define ARM_PSCI_1_0_FN_NODE_HW_STATE ARM_PSCI_0_2_FN(13)
78 #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND ARM_PSCI_0_2_FN(14)
79 #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE ARM_PSCI_0_2_FN(15)
80 #define ARM_PSCI_1_0_FN_STAT_RESIDENCY ARM_PSCI_0_2_FN(16)
81 #define ARM_PSCI_1_0_FN_STAT_COUNT ARM_PSCI_0_2_FN(17)
83 #define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN64(12)
84 #define ARM_PSCI_1_0_FN64_NODE_HW_STATE ARM_PSCI_0_2_FN64(13)
85 #define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND ARM_PSCI_0_2_FN64(14)
86 #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
87 #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
89 /* 1KB stack per core */
90 #define ARM_PSCI_STACK_SHIFT 10
91 #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
93 /* PSCI affinity level state returned by AFFINITY_INFO */
94 #define PSCI_AFFINITY_LEVEL_ON 0
95 #define PSCI_AFFINITY_LEVEL_OFF 1
96 #define PSCI_AFFINITY_LEVEL_ON_PENDING 2
98 #define PSCI_RESET2_TYPE_VENDOR_SHIFT 31
99 #define PSCI_RESET2_TYPE_VENDOR BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT)
102 #include <asm/types.h>
103 #include <linux/bitops.h>
105 /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
106 u32 psci_get_target_pc(int cpu);
107 u32 psci_get_context_id(int cpu);
108 void psci_save(int cpu, u32 pc, u32 context_id);
110 void psci_cpu_entry(void);
111 u32 psci_get_cpu_id(void);
112 void psci_cpu_off_common(void);
114 int psci_update_dt(void *fdt);
115 void psci_board_init(void);
116 int fdt_psci(void *fdt);
118 void psci_v7_flush_dcache_all(void);
119 #endif /* ! __ASSEMBLY__ */
121 #endif /* __ARM_PSCI_H__ */